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* intel/compiler: force simd8 when dual src blending on gen8Tapani Pälli2019-12-051-0/+10
* intel/compiler: add newline to limit_dispatch_width messageTapani Pälli2019-12-051-1/+1
* intel/compiler: Fix 'comparison is always true' warningIan Romanick2019-12-041-2/+2
* intel/compiler: Increase nir_opt_peephole_select thresholdIan Romanick2019-12-021-1/+1
* intel/fs: Disable conditional discard optimization on Gen4 and Gen5Ian Romanick2019-11-211-1/+8
* Revert "i965/fs: Merge CMP and SEL into CSEL on Gen8+"Jason Ekstrand2019-11-202-108/+0
* nir: move data.image.access to data.accessMarek Olšák2019-11-191-2/+2
* intel/compiler: Don't change hstride if not neededIván Briano2019-11-181-5/+6
* intel/compiler: Add a flag to avoid compacting push constantsJason Ekstrand2019-11-183-145/+167
* intel/compiler: remove old commentItalo Nicola2019-11-181-3/+0
* intel/fs: Do not lower large local arrays to scratch on gen7Danylo Piliaiev2019-11-141-1/+5
* intel/compiler: fix nir_op_{i,u}*32 on ICLPaulo Zanoni2019-11-131-1/+1
* intel/fs: Lower large local arrays to scratchJason Ekstrand2019-11-111-0/+19
* intel/fs: Implement the new load/store_scratch intrinsicsJason Ekstrand2019-11-115-17/+241
* intel/nir: Plumb devinfo through lower_mem_access_bit_sizesJason Ekstrand2019-11-113-9/+14
* intel/fs: refactor surface header setupJason Ekstrand2019-11-111-23/+16
* intel/fs: Add DWord scattered read/write opcodesJason Ekstrand2019-11-115-0/+66
* intel/nir: Use nir_extract_bits in lower_mem_access_bit_sizesJason Ekstrand2019-11-111-37/+15
* intel/compiler: remove the operand restriction for src1 on GLKPaulo Zanoni2019-11-051-2/+1
* intel/compiler: Report the number of non-spill/fill SEND messages on vec4 tooIan Romanick2019-10-301-5/+35
* intel/eu/validate/gen12: Add TGL to eu_validate tests.Jordan Justen2019-10-301-0/+9
* intel/compiler: Add instruction compaction support on Gen12Matt Turner2019-10-302-184/+868
* intel/compiler: Make separate src0/src1 index tablesMatt Turner2019-10-301-11/+18
* intel/compiler: Inline get_src_index()Matt Turner2019-10-301-26/+15
* intel/compiler: Restructure instruction compaction in preparation for Gen12Matt Turner2019-10-301-20/+28
* intel/compiler: Remove unreachable() from brw_reg_type.cMatt Turner2019-10-301-3/+3
* intel/vec4: Set brw_stage_prog_data::has_ubo_pullJason Ekstrand2019-10-301-0/+2
* util: rename list_empty() to list_is_empty()Timothy Arceri2019-10-281-3/+3
* intel/compiler: Fix C++ one definition rule violationsDanylo Piliaiev2019-10-284-20/+20
* intel/fs: Implement scoped_memory_barrierCaio Marcelo de Oliveira Filho2019-10-241-8/+19
* intel/fs: Check for NULL key in fs_visitor constructorMichel Dänzer2019-10-241-1/+4
* intel/compiler: Cast to target type before shifting leftMichel Dänzer2019-10-241-1/+1
* intel/compiler: Don't left-shift by >= the number of bits of the typeMichel Dänzer2019-10-241-2/+2
* intel/compiler: Refactor disassembly of sources in 3src instructionSagar Ghuge2019-10-211-19/+10
* intel/compiler: Don't move immediate in registerSagar Ghuge2019-10-211-0/+38
* intel/compiler: Set bits according to source fileSagar Ghuge2019-10-211-2/+12
* intel/compiler: Add Immediate support for 3 source instructionSagar Ghuge2019-10-211-21/+32
* intel/compiler: Remove emit_alpha_to_coverage workaround from backendSagar Ghuge2019-10-212-84/+13
* nir: Add alpha_to_coverage lowering passSagar Ghuge2019-10-213-0/+171
* intel/compiler: Report the number of non-spill/fill SEND messagesKenneth Graunke2019-10-171-5/+30
* intel/vec4: Don't try both sources as immediates for DPHIan Romanick2019-10-171-1/+1
* intel/fs/gen12: Add tests for scoreboard passCaio Marcelo de Oliveira Filho2019-10-172-1/+864
* intel/fs/gen12: Use TCS 8_PATCH mode.Kenneth Graunke2019-10-112-6/+8
* intel/fs/gen12: Implement gl_FrontFacing on gen12+.Jason Ekstrand2019-10-112-2/+25
* intel/fs/gen11+: Fix CS_OPCODE_CS_TERMINATE codegen.Francisco Jerez2019-10-112-8/+11
* intel/fs/gen12: Fix barrier codegen.Francisco Jerez2019-10-112-2/+7
* intel/eu: Don't set notify descriptor field of gateway barrier message.Francisco Jerez2019-10-111-1/+0
* intel/ir/gen12: Update assert in brw_stage_has_packed_dispatch().Francisco Jerez2019-10-111-1/+1
* intel/eu/validate/gen12: Don't blow up on indirect src0.Jason Ekstrand2019-10-111-1/+2
* intel/eu/validate/gen12: Validation fixes for SEND instruction.Francisco Jerez2019-10-111-22/+28
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