index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
intel
/
compiler
Commit message (
Expand
)
Author
Age
Files
Lines
*
nir: rename nir_link_constant_varyings() nir_link_opt_varyings()
Timothy Arceri
2019-01-02
1
-1
/
+1
*
intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs
Iago Toral Quiroga
2018-12-20
1
-2
/
+2
*
intel/compiler: More peephole_select for pre-Gen6
Ian Romanick
2018-12-17
1
-2
/
+2
*
nir/opt_peephole_select: Don't peephole_select expensive math instructions
Ian Romanick
2018-12-17
1
-2
/
+2
*
intel/compiler: More peephole select
Ian Romanick
2018-12-17
1
-1
/
+14
*
nir/opt_peephole_select: Don't try to remove flow control around indirect loads
Ian Romanick
2018-12-17
1
-1
/
+12
*
i965/vec4: Propagate conditional modifiers from more compares to other compares
Ian Romanick
2018-12-17
1
-3
/
+100
*
i965/fs: Eliminate unary op on operand of compare-with-zero
Ian Romanick
2018-12-17
2
-17
/
+14
*
i965/vec4/dce: Don't narrow the write mask if the flags are used
Ian Romanick
2018-12-17
3
-10
/
+203
*
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
Ian Romanick
2018-12-17
3
-9
/
+9
*
nir: Add a bool to int32 lowering pass
Jason Ekstrand
2018-12-16
1
-0
/
+2
*
nir: Rename Boolean-related opcodes to include 32 in the name
Jason Ekstrand
2018-12-16
3
-102
/
+102
*
nir: Move intel's half-float image store lowering to to nir_format.h.
Eric Anholt
2018-12-13
1
-8
/
+2
*
Revert "intel: Simplify the half-float packing in image load/store lowering."
Eric Anholt
2018-12-13
1
-2
/
+8
*
i965: Enable nir_opt_idiv_const for 32 and 64-bit integers
Jason Ekstrand
2018-12-13
1
-1
/
+3
*
i965/vec4: Implement nir_op_uadd_sat
Jason Ekstrand
2018-12-13
1
-0
/
+6
*
i965/fs: Implement nir_op_uadd_sat
Ian Romanick
2018-12-13
1
-0
/
+5
*
intel: Simplify the half-float packing in image load/store lowering.
Eric Anholt
2018-12-12
1
-8
/
+2
*
nir: Pull some of intel's image load/store format conversion to nir_format.h
Eric Anholt
2018-12-12
1
-18
/
+2
*
intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments
Iago Toral Quiroga
2018-12-12
1
-0
/
+21
*
intel/fs: Support min_lod parameters on texture instructions
Jason Ekstrand
2018-12-11
4
-2
/
+31
*
intel/ir: Don't allow allocating zero registers
Jason Ekstrand
2018-12-11
1
-0
/
+1
*
i965/fs: Handle V/UV immediates in dump_instructions()
Matt Turner
2018-12-10
1
-0
/
+5
*
intel/compiler: Always print flag subregister number
Sagar Ghuge
2018-12-10
1
-7
/
+6
*
intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region
Sagar Ghuge
2018-12-10
1
-1
/
+18
*
nir: Make boolean conversions sized just like the others
Jason Ekstrand
2018-12-05
2
-11
/
+17
*
mesa: Revert INTEL_fragment_shader_ordering support
Matt Turner
2018-12-03
1
-1
/
+0
*
intel/compiler: Use nir's info when checking uses_streams.
Kenneth Graunke
2018-11-28
1
-1
/
+1
*
intel/compiler: fix register allocation in opt_peephole_sel
Iago Toral Quiroga
2018-11-28
1
-2
/
+1
*
intel/compiler: fix indentation style in opt_algebraic()
Iago Toral Quiroga
2018-11-27
1
-10
/
+10
*
i965: Do NIR shader cloning in the caller.
Kenneth Graunke
2018-11-20
6
-15
/
+10
*
meson: Add tests to suites
Dylan Baker
2018-11-20
1
-1
/
+2
*
i965: Allow only one slot of clip distances to be set on Gen4-5.
Kenneth Graunke
2018-11-19
1
-1
/
+3
*
intel/fs,vec4: Fix a compiler warning
Jason Ekstrand
2018-11-19
2
-3
/
+3
*
intel,nir: Move gl_LocalInvocationID lowering to nir_lower_system_values
Jason Ekstrand
2018-11-19
2
-33
/
+1
*
intel/compiler: Lower SSBO and shared loads/stores in NIR
Jason Ekstrand
2018-11-15
6
-405
/
+420
*
intel/compiler: Disassemble GEN6_SFID_DATAPORT_SAMPLER_CACHE as dp_sampler
Sagar Ghuge
2018-11-15
1
-1
/
+1
*
nir: Allow to skip integer ops in nir_lower_to_source_mods
Gert Wollny
2018-11-14
1
-1
/
+1
*
anv/i965: make use of nir_link_constant_varyings()
Timothy Arceri
2018-11-13
1
-0
/
+3
*
i965: add support for sampling from AYUV
Lionel Landwerlin
2018-11-12
2
-0
/
+2
*
intel/fs: Prevent emission of IR instructions not aligned to their own execut...
Francisco Jerez
2018-11-09
1
-3
/
+17
*
intel/compiler: fix node interference of simd16 instructions
Iago Toral Quiroga
2018-11-09
1
-19
/
+17
*
intel/fs: Add an assert to optimize_frontfacing_ternary
Jason Ekstrand
2018-11-08
1
-0
/
+3
*
intel/analyze_ubo_ranges: Use nir_src_is_const and friends
Jason Ekstrand
2018-11-08
1
-8
/
+7
*
intel/vec4: Use the new nir_src_is_const and friends
Jason Ekstrand
2018-11-08
3
-54
/
+46
*
intel/fs: Use the new nir_src_is_const and friends
Jason Ekstrand
2018-11-08
1
-110
/
+87
*
intel/fs,vec4: Clean up a repeated pattern with SSBOs
Jason Ekstrand
2018-11-08
4
-166
/
+85
*
intel/compiler: Stop assuming the entrypoint is called "main"
Jason Ekstrand
2018-10-30
3
-22
/
+5
*
intel/nir: Use the OPT macro for more passes
Jason Ekstrand
2018-10-26
1
-3
/
+3
*
nir/builder: Add a nir_imm_true/false helpers
Jason Ekstrand
2018-10-26
1
-1
/
+1
[next]