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path: root/src/intel/compiler/brw_vec4_generator.cpp
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* i965: Pass pointer and end of assembly to brw_validate_instructionsMatt Turner2017-05-151-2/+6
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-091-2/+2
* i965/vec4: don't modify regioning parameters to the sources of DF align1 inst...Samuel Iglesias Gonsálvez2017-05-031-8/+1
* i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.Matt Turner2017-04-141-4/+12
* i965/vec4: fix assert to detect SIMD lowered DF instructions in IVBFrancisco Jerez2017-04-141-5/+1
* i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez2017-04-141-2/+21
* i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2017-04-141-8/+0
* i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYTJuan A. Suarez Romero2017-04-141-7/+19
* i965/vec4: split DF instructions and later double its execsize in IVB/BYTSamuel Iglesias Gonsálvez2017-04-141-1/+10
* i965: Use source region <1,2,0> when converting to DF.Matt Turner2017-04-141-12/+1
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+2217