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src
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intel
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compiler
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brw_vec4_generator.cpp
Commit message (
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Author
Age
Files
Lines
*
i965: Pass pointer and end of assembly to brw_validate_instructions
Matt Turner
2017-05-15
1
-2
/
+6
*
nir: Embed the shader_info in the nir_shader again
Jason Ekstrand
2017-05-09
1
-2
/
+2
*
i965/vec4: don't modify regioning parameters to the sources of DF align1 inst...
Samuel Iglesias Gonsálvez
2017-05-03
1
-8
/
+1
*
i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.
Matt Turner
2017-04-14
1
-4
/
+12
*
i965/vec4: fix assert to detect SIMD lowered DF instructions in IVB
Francisco Jerez
2017-04-14
1
-5
/
+1
*
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
Samuel Iglesias Gonsálvez
2017-04-14
1
-2
/
+21
*
i965/vec4: split d2x conversion and data gathering from one opcode to two exp...
Samuel Iglesias Gonsálvez
2017-04-14
1
-8
/
+0
*
i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT
Juan A. Suarez Romero
2017-04-14
1
-7
/
+19
*
i965/vec4: split DF instructions and later double its execsize in IVB/BYT
Samuel Iglesias Gonsálvez
2017-04-14
1
-1
/
+10
*
i965: Use source region <1,2,0> when converting to DF.
Matt Turner
2017-04-14
1
-12
/
+1
*
i965: Move the back-end compiler to src/intel/compiler
Jason Ekstrand
2017-03-13
1
-0
/
+2217