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* radeon: handle query buffer allocation and mapping failuresNicolai Hähnle2016-04-212-9/+33
* radeon: wire end_query return value to sw/hw_endNicolai Hähnle2016-04-212-7/+10
* gallium: add bool return to pipe_context::end_queryNicolai Hähnle2016-04-2119-26/+49
* softpipe: fix a warning due to an incorrect enum comparisonMarek Olšák2016-04-221-1/+1
* gallium: remove helpers converting to/from TGSI_PROCESSOR_*Marek Olšák2016-04-224-37/+3
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-2243-314/+305
* gallium: merge PIPE_SWIZZLE_* and UTIL_FORMAT_SWIZZLE_*Marek Olšák2016-04-2260-449/+439
* gallium: use enums in p_shader_tokens.h (v2)Marek Olšák2016-04-221-139/+164
* gallium: use enums in p_defines.h (v2)Marek Olšák2016-04-221-173/+205
* radeonsi: remove the shader parameter from si_set_ring_bufferMarek Olšák2016-04-223-15/+11
* radeonsi: decrease GS copy shader user SGPRs to 2Marek Olšák2016-04-222-3/+3
* radeonsi: shorten slot masks to 32 bitsMarek Olšák2016-04-224-63/+61
* radeonsi: clean up shader resource limit definitionsMarek Olšák2016-04-223-23/+12
* radeonsi: move default tess level constant buffer to RW buffersMarek Olšák2016-04-225-10/+35
* radeonsi: move sample positions constant buffer to RW buffersMarek Olšák2016-04-223-4/+5
* radeonsi: move clip plane constant buffer to RW buffersMarek Olšák2016-04-224-14/+12
* radeonsi: rework polygon stippling to use constant buffer instead of textureMarek Olšák2016-04-226-101/+55
* radeonsi: generalize si_set_constant_bufferMarek Olšák2016-04-221-10/+17
* radeonsi: make RW buffer descriptor array global, not per shader stageMarek Olšák2016-04-222-51/+43
* radeonsi: rename and rearrange RW buffer slotsMarek Olšák2016-04-224-30/+39
* gallivm: fix bogus argument order to lp_build_sample_mipmap functionRoland Scheidegger2016-04-211-2/+2
* radeonsi: Add config parameter to si_shader_apply_scratch_relocs.Bas Nieuwenhuizen2016-04-214-3/+5
* swr: add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT to get_paramTim Rowley2016-04-211-0/+1
* st/dri: add 32-bit RGBX/RGBA formatsRob Herring2016-04-212-0/+10
* gallium/radeon: Silence possibly uninitialized variable warning.Bas Nieuwenhuizen2016-04-211-1/+1
* winsys/amdgpu: Silence possibly uninitialized variable warning.Bas Nieuwenhuizen2016-04-211-0/+3
* radeonsi: Enable loading into CE RAM.Bas Nieuwenhuizen2016-04-213-0/+14
* radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.Bas Nieuwenhuizen2016-04-212-2/+5
* winsys/amdgpu: fix preamble IB sizeThomas Hindoe Paaboel Andersen2016-04-211-0/+1
* gk110/ir: make use of IMUL32I for all immediatesSamuel Pitoiset2016-04-201-1/+1
* gk110/ir: do not overwrite def value with zero for EXCH opsSamuel Pitoiset2016-04-201-6/+15
* nir: rename nir_foreach_block*() to nir_foreach_block*_call()Connor Abbott2016-04-205-5/+5
* nvc0: avoid tex read fault from compute shaders on GK110Samuel Pitoiset2016-04-201-0/+3
* swr: fix resource backed constant buffersTim Rowley2016-04-202-7/+7
* nouveau: codegen: Add support for OpenCL global memory buffersHans de Goede2016-04-201-2/+10
* nouveau: codegen: Use FILE_MEMORY_BUFFER for buffersHans de Goede2016-04-206-5/+13
* st/dri: implement the GL interop DRI extension (v2.2)Marek Olšák2016-04-201-0/+258
* st/dri: Fix RGB565 EGLImage creationNicolas Dufresne2016-04-201-20/+24
* st/dri: Factor out DRI2 to PIPE_FORMAT conversionNicolas Dufresne2016-04-201-34/+27
* freedreno/a4xx: lower srgb in shader for astc texturesRob Clark2016-04-197-6/+62
* freedreno: cleanup fd_set_sampler_viewsRob Clark2016-04-191-37/+24
* tgsi/lowering: improved lowering for LRPRussell King2016-04-191-35/+20
* tgsi/lowering: improved lowering for XPDRussell King2016-04-191-22/+13
* tgsi/lowering: add support for lowering TRUNCRussell King2016-04-192-0/+85
* tgsi/lowering: add support for lowering FLR and CEILRussell King2016-04-192-20/+149
* radeonsi: enable TGSI support cap for compute shadersBas Nieuwenhuizen2016-04-192-7/+30
* radeonsi: Consider input SGPR count for compute shader SGPR count.Bas Nieuwenhuizen2016-04-192-6/+13
* radeonsi: Add CE synchronization for compute dispatches.Bas Nieuwenhuizen2016-04-193-2/+8
* radeonsi: clean up compute flushBas Nieuwenhuizen2016-04-192-18/+8
* radeonsi: do not do two full flushes on every compute dispatchBas Nieuwenhuizen2016-04-195-22/+17
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