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* gallium: add PIPE_CAP_MAX_VERTEX_BUFFERSChristian Gmeiner2019-12-213-0/+5
* kmsro: Extend to include ingenic-drmPaul Cercueil2019-12-213-0/+3
* kmsro: Add "mcde" entry pointStephan Gerhold2019-12-213-0/+3
* nv50ir/nir: support vec8 and vec16Karol Herbst2019-12-211-1/+3
* llvmpipe: switch to NIR by defaultDave Airlie2019-12-213-8/+24
* gallivm/nir: wrap idiv to avoid divide by 0 (v2)Dave Airlie2019-12-211-4/+21
* lima: set shader caps to optimize control flowErico Nunes2019-12-201-2/+16
* lima/ppir: remove assert on ppir_emit_tex unsupported featureErico Nunes2019-12-201-1/+0
* lima/ppir: fix lod bias srcErico Nunes2019-12-205-11/+16
* lima: Fix dump file creationAndreas Baierl2019-12-201-3/+5
* radeon/vcn2: enable rate control for hevc encodingPierre-Eric Pelloux-Prayer2019-12-201-1/+7
* etnaviv: Replace bitwise OR with logical ORMarek Vasut2019-12-201-1/+1
* etnaviv: update resource status after flushingChristian Gmeiner2019-12-201-0/+8
* util/format: add missing vulkan formatsJonathan Marek2019-12-191-2/+24
* lima: Rotate dump files after each finished pp frameAndreas Baierl2019-12-195-13/+48
* lima: drop suballocatorVasily Khoruzhick2019-12-194-30/+14
* lima: use single BO for GP outputsVasily Khoruzhick2019-12-193-43/+43
* freedreno/registers: document vertex/instance id offset bitsJonathan Marek2019-12-191-1/+1
* freedreno/a6xx: Set up multisample sysmem MRTs correctlyKristian H. Kristensen2019-12-191-3/+1
* freedreno/a6xx: Rewrite compressed blits in a helper functionKristian H. Kristensen2019-12-191-33/+63
* freedreno/a6xx: Move handle_rgba_blit() upKristian H. Kristensen2019-12-191-53/+51
* freedreno/a6xx: Handle srgb blits on the blitterKristian H. Kristensen2019-12-191-10/+20
* freedreno/a6xx: Use A6XX_SP_2D_SRC_FORMAT_MASK macroKristian H. Kristensen2019-12-191-1/+1
* freedreno/a6xx: RB6_R8G8B8 is actually 32 bit RGBXKristian H. Kristensen2019-12-193-10/+10
* freedreno/a6xx: Use blitter for resolve blitsKristian H. Kristensen2019-12-191-24/+5
* freedreno/a6xx: Add fd_resource_swap() helperKristian H. Kristensen2019-12-194-5/+12
* freedreno/a6xx: Pick blitter swap based on resource tilingKristian H. Kristensen2019-12-191-2/+5
* freedreno/a6xx: Program sampler swap based on resource tilingKristian H. Kristensen2019-12-191-16/+4
* freedreno: Add debug flag for forcing linear layoutsKristian H. Kristensen2019-12-193-25/+33
* freedreno/a6xx: Make DEBUG_BLIT_FALLBACK only dump fallbacksKristian H. Kristensen2019-12-191-3/+5
* st/va: Convert interlaced NV12 to progressiveThong Thai2019-12-191-4/+48
* ac: declare an enum for the OOB select field on GFX10Samuel Pitoiset2019-12-193-8/+8
* zink: implement nir_texop_txdErik Faye-Lund2019-12-194-11/+26
* zink: enable PIPE_CAP_MIXED_COLORBUFFER_FORMATSErik Faye-Lund2019-12-191-2/+0
* freedreno: Fix CP_MEM_TO_REG flag definitionsConnor Abbott2019-12-182-3/+3
* freedreno: Use new macros for CP_WAIT_REG_MEM and CP_WAIT_MEM_GTEConnor Abbott2019-12-182-12/+14
* a6xx: Add more CP packetsConnor Abbott2019-12-185-12/+12
* i965/iris/perf: factor out frequency register captureLionel Landwerlin2019-12-181-25/+14
* freedreno/a6xx: Document the CP_SET_DRAW_STATE enable bitsKristian H. Kristensen2019-12-172-26/+32
* panfrost: Handle empty shadersAlyssa Rosenzweig2019-12-171-3/+8
* panfrost: Let precompile imply shaderdbAlyssa Rosenzweig2019-12-172-2/+4
* panfrost: Add PAN_MESA_DEBUG=precompile for shader-dbAlyssa Rosenzweig2019-12-173-3/+33
* virgl: Increase the shader transfer buffer by doubling the sizeGert Wollny2019-12-171-2/+3
* panfrost: Don't double-create scratchpadAlyssa Rosenzweig2019-12-161-1/+7
* panfrost: Simplify sampler upload conditionAlyssa Rosenzweig2019-12-161-1/+1
* gallium/auxiliary: Handle count == 0 in u_vbuf_get_minmax_index_mappedIcecream952019-12-161-0/+6
* gallium/auxiliary: Reduce conversions in u_vbuf_get_minmax_index_mappedIcecream952019-12-161-6/+12
* radeonsi/gfx10: fix ngg_get_ordered_idMarek Olšák2019-12-162-2/+2
* radeonsi: reset more fields in si_llvm_context_set_ir to fix reusing ctxMarek Olšák2019-12-161-0/+2
* radeonsi: fix determining whether the VS prolog is neededMarek Olšák2019-12-161-3/+6
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