aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: make wait_mem_scratch unmappableMarek Olšák2020-06-261-1/+4
* radeonsi: don't add the tess ring buffers into the cs_preamble stateMarek Olšák2020-06-262-3/+5
* radeonsi: rename init_config states to cs_preamble statesMarek Olšák2020-06-267-47/+45
* radeonsi: don't add the border color buffer into the init_config stateMarek Olšák2020-06-262-1/+3
* ac,winsys/amdgpu: align IBs the same as the kernelMarek Olšák2020-06-261-11/+16
* amd: add proper definitions for NOP packetsMarek Olšák2020-06-261-4/+4
* panfrost: Only copy resources when they are in a pending batchIcecream952020-06-261-3/+7
* iris: Align last_seqnos to 64 bits.Rafael Antognolli2020-06-251-1/+4
* freedreno/a6xx: Add support for polygon fill mode (as long as front==back).Eric Anholt2020-06-252-3/+17
* freedreno/a6xx: Define the register fields for polygon fill mode.Eric Anholt2020-06-251-2/+2
* zink: unify code for setting resource barriersMike Blumenkrantz2020-06-251-26/+20
* iris: Honor scanout requirement from DRIDanylo Piliaiev2020-06-251-1/+1
* freedreno: handle batch flush in resource trackingRob Clark2020-06-251-4/+30
* freedreno: split out batch clear tracking helperRob Clark2020-06-251-15/+25
* freedreno: split out batch draw tracking helperRob Clark2020-06-251-72/+82
* freedreno: make foreach_bit() declare it's cursorRob Clark2020-06-255-5/+3
* freedreno/ir3: switch PIPE_CAP_TGSI_TEXCOORDRob Clark2020-06-242-6/+9
* freedreno: convert builtin blit VS prog to ureg builderRob Clark2020-06-241-17/+43
* freedreno/a3xx: use point-coord helperRob Clark2020-06-241-33/+25
* freedreno/a4xx: use point-coord helperRob Clark2020-06-241-33/+25
* freedreno/a5xx: use point-coord helperRob Clark2020-06-241-33/+25
* freedreno/a6xx: use point-coord helperRob Clark2020-06-241-33/+25
* freedreno/a6xx: de-duplicate vinterp/vpsrepl state buildingRob Clark2020-06-241-92/+71
* freedreno/ir3: add helper to determine point-coord inputsRob Clark2020-06-241-0/+18
* freedreno/registers: a6xx depth bounds test registersJonathan Marek2020-06-241-2/+2
* android: freedreno/ir3: simplify generated sources rulesMauro Rossi2020-06-242-47/+0
* android: freedreno/ir3: add missing generated sources and rulesMauro Rossi2020-06-241-1/+1
* zink: clamp VkImageCreateInfo.arrayLayers to 1 for image resource creationMike Blumenkrantz2020-06-241-1/+1
* iris/compute: Split out iris_load_indirect_locationJordan Justen2020-06-241-20/+29
* iris: Split walker and state update into iris_upload_gpgpu_walkerJordan Justen2020-06-241-35/+48
* freedreno: Handle DRM_FORMAT_MOD_INVALID in shared codeKristian H. Kristensen2020-06-231-0/+6
* iris: Delete useless #defineKenneth Graunke2020-06-231-1/+0
* glsl,driconf: add allow_glsl_120_subset_in_110 for SPECviewperf13Marek Olšák2020-06-233-0/+4
* radeonsi: replace ctx->screen with sscreen in si_flush_gfx_csMarek Olšák2020-06-231-4/+4
* radeonsi: don't wait for idle at the end of gfx IBsMarek Olšák2020-06-231-0/+14
* radeonsi: compact MRTs to save PS export memory spaceMarek Olšák2020-06-232-20/+36
* iris: Make use of devinfo has_aux_map fieldJordan Justen2020-06-221-1/+1
* util: rename xmlpool.h to driconf.hEric Engestrom2020-06-226-6/+6
* driconf: drop now unused translation facilityEric Engestrom2020-06-2211-12/+10
* zink: use correct define value for reserved slot count in ntvMike Blumenkrantz2020-06-221-1/+1
* iris/bufmgr: Do not use map_gtt or use set/get_tiling on DG1Rafael Antognolli2020-06-223-11/+37
* iris/l3: Enable L3 full way allocation when L3 config is NULLJordan Justen2020-06-221-4/+11
* v3d: Disable PIPE_CAP_PRIMITIVE_RESTARTNeil Roberts2020-06-221-1/+0
* gallium: Add pipe cap for primitive restart with fixed indexNeil Roberts2020-06-2220-0/+25
* nv50/ir/ra: fix memory corruption when spillingKarol Herbst2020-06-221-22/+71
* nv50/ir/ra: convert some for loops to Range-based for loopsKarol Herbst2020-06-221-11/+8
* panfrost: Copy resources when mapping to avoid waiting for readersIcecream952020-06-221-1/+23
* panfrost: Update sampler views when the texture bo changesIcecream952020-06-223-1/+4
* panfrost: RGBA4 and RGB5_A1 framebuffer supportIcecream952020-06-222-0/+3
* r600/sfn: Don't set num_components on TESS sysvalue intrinsicsGert Wollny2020-06-222-12/+8
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 07:04:00 +0000