aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* freedreno/a3xx: Mostly fix min-vs-mag filtering decisions on non-mipmap tex.Eric Anholt2019-09-261-5/+12
* lima: support rectangle textureIcenowy Zheng2019-09-264-3/+9
* amd/common: Introduce ac_get_fs_input_vgpr_cnt.Timur Kristóf2019-09-261-40/+3
* freedreno/a6xx: Move instrlen and obj_start writes to fd6_emit_shaderKristian H. Kristensen2019-09-251-32/+44
* freedreno/a6xx: Emit const and texture state for HS/DS/GSKristian H. Kristensen2019-09-254-8/+74
* freedreno/ir3: Add HS/DS/GS to shader key and cacheKristian H. Kristensen2019-09-252-6/+31
* freedreno/a6xx: Add generic program stateobj support for HS/DS/GSKristian H. Kristensen2019-09-254-19/+75
* freedreno: Move fs functions after geometry pipeline stagesKristian H. Kristensen2019-09-251-10/+10
* freedreno: Add state binding functions for HS/DS/GSKristian H. Kristensen2019-09-252-1/+31
* freedreno: Rename vp and fp to vs and fs in fd_program_stateobjKristian H. Kristensen2019-09-2516-104/+104
* freedreno/a6xx: Factor out const state setupKristian H. Kristensen2019-09-251-27/+20
* st/nine: Ignore D3DSIO_RET if it is the last instruction in a shaderDanylo Piliaiev2019-09-251-1/+7
* lima/ppir: Add various varying fetch sources to disassemblerAndreas Baierl2019-09-251-23/+50
* clover: eliminate "ignoring attributes on template argument" warningKarol Herbst2019-09-251-1/+10
* clover/codegen: remove unused get_symbol_offsets functionKarol Herbst2019-09-251-12/+0
* clover/llvm: remove harmful std::move callKarol Herbst2019-09-251-1/+1
* iris: disable aux on first get_param if not created with auxTapani Pälli2019-09-251-9/+22
* lima/ppir: add support for indirect load of uniforms and varyingsVasily Khoruzhick2019-09-246-12/+60
* lima/ppir: add node dependency typesVasily Khoruzhick2019-09-246-28/+58
* lima/ppir: don't attempt to clone tex coords if it's not varyingVasily Khoruzhick2019-09-251-3/+10
* radeonsi/nir: lower load constants to scalarTimothy Arceri2019-09-251-0/+5
* radeonsi: fix VAAPI segfault due to various bugsMichel Dänzer2019-09-243-0/+3
* gallium/vl: don't set PIPE_HANDLE_USAGE_EXPLICIT_FLUSHMarek Olšák2019-09-241-4/+1
* radeonsi: initialize displayable DCC using the retile blit to prevent hangsMarek Olšák2019-09-241-2/+10
* nouveau: add idep_nir_headers as dep for libnouveauStephen Barber2019-09-241-2/+2
* lima/gpir: Fix 64-bit shift in scheduler spillingConnor Abbott2019-09-241-2/+2
* lima/gpir: Don't emit movs when translating from NIRConnor Abbott2019-09-241-36/+50
* lima/gpir: Fix postlog2 fixup handlingConnor Abbott2019-09-241-11/+12
* lima/gpir: Use registers for values live in multiple blocksConnor Abbott2019-09-247-156/+648
* lima/gpir: Support branch instructionsConnor Abbott2019-09-246-78/+102
* lima/gpir: Only try to place actual childrenConnor Abbott2019-09-241-1/+1
* lima/gpir: Fix compiler warningConnor Abbott2019-09-241-1/+1
* intel: Increase Gen11 compute shader scratch IDs to 64.Kenneth Graunke2019-09-231-0/+15
* Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"Kenneth Graunke2019-09-231-9/+0
* freedreno/a6xx: do streamout only in binning passRob Clark2019-09-232-13/+16
* freedreno/a6xx: fix binning pass vs. xfbRob Clark2019-09-231-3/+7
* freedreno/a6xx: un-open-code PC_PRIMITIVE_CNTL_1.PSIZERob Clark2019-09-231-1/+1
* tgsi_to_nir: fix 2-component system values like tess_level_inner_defaultMarek Olšák2019-09-231-1/+3
* tgsi_to_nir: fix masked out image loadsMarek Olšák2019-09-231-2/+1
* nv50/ir/nir: comparison of integer expressions of different signedness warningKarol Herbst2019-09-231-1/+1
* nv50/ir: fix unnecessary parentheses warningKarol Herbst2019-09-231-1/+1
* lima: remove partial clear support from pipe->clear()Erico Nunes2019-09-231-93/+5
* dEQP-GLES2.functional.buffer.write.use.index_array.* are passing now.Boris Brezillon2019-09-231-2/+0
* panfrost: Fix indexed drawsBoris Brezillon2019-09-231-1/+1
* clover/nir: fix compilation with g++-5.5 and maybe earlierKarol Herbst2019-09-231-10/+7
* lima: implement BO cacheVasily Khoruzhick2019-09-228-30/+212
* lima: use 0 to poll if BO is busy in lima_bo_wait()Vasily Khoruzhick2019-09-221-1/+7
* lima: move damage bound build to resourceQiang Yu2019-09-233-22/+41
* lima: don't use damage system when full damageQiang Yu2019-09-231-0/+14
* lima: implement EGL_KHR_partial_updateQiang Yu2019-09-235-65/+86
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 23:33:02 +0000