aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* winsys/amdgpu: enable chaining for compute IBsMarek Olšák2019-04-231-6/+6
* winsys/amdgpu: reorder chunks, make BO_HANDLES first, IB and FENCE lastMarek Olšák2019-04-231-19/+17
* winsys/amdgpu: make IBs writable and expose their addressMarek Olšák2019-04-232-1/+4
* ac: add radeon_info::marketing_name, replacing the winsys callbackMarek Olšák2019-04-234-33/+4
* tgsi/scan: add uses_drawidMarek Olšák2019-04-233-0/+7
* iris: Track valid data range and infer unsynchronized mappings.Kenneth Graunke2019-04-235-0/+78
* iris: Make a resource_is_busy() helperKenneth Graunke2019-04-231-4/+13
* iris: Replace buffer backing storage and rebind to update addresses.Kenneth Graunke2019-04-234-5/+171
* iris: Make memzone_for_address non-staticKenneth Graunke2019-04-232-5/+7
* iris: Make a gl_shader_stage -> pipe_shader_stage helper functionKenneth Graunke2019-04-231-0/+14
* iris: Rework image views to store pipe_image_view.Kenneth Graunke2019-04-234-35/+52
* iris: Rework UBOs and SSBOs to use pipe_shader_bufferKenneth Graunke2019-04-232-104/+71
* iris: Track bound constant buffersKenneth Graunke2019-04-232-0/+6
* iris: Mark constants dirty on transfer unmap even if no flushes occurKenneth Graunke2019-04-231-2/+8
* radeonsi: use CP DMA for the null const buffer clear on CIKMarek Olšák2019-04-225-10/+16
* iris: Track bound and writable SSBOsKenneth Graunke2019-04-222-1/+16
* virgl: clear vertex_array_dirtyChia-I Wu2019-04-221-0/+2
* gallivm: disable NEON instructions if they are not supportedLubomir Rintel2019-04-221-0/+7
* gallivm: guess CPU features also on ARMLubomir Rintel2019-04-221-7/+6
* iris: Enable the dual_color_blend_by_location driconf option.Kenneth Graunke2019-04-224-0/+24
* iris: Add mechanism for iris-specific driconf optionsKenneth Graunke2019-04-2211-8/+75
* lima: add Android buildIcenowy Zheng2019-04-213-0/+121
* st/nine: skip position checks in SetCursorPosition()Andre Heider2019-04-201-3/+5
* panfrost/mdg: Use shared fsign loweringAlyssa Rosenzweig2019-04-194-11/+4
* panfrost: Fixup vertex offsets to prevent shadow copyAlyssa Rosenzweig2019-04-192-43/+67
* panfrost: Track BO lifetime with jobs and reference countsAlyssa Rosenzweig2019-04-199-37/+207
* gallium/auxiliary/vl: Fix a couple of warningsKristian H. Kristensen2019-04-192-8/+2
* tgsi: Mark tgsi_strings_check() unusedKristian H. Kristensen2019-04-191-1/+1
* lima: enable nir fsign lowering in ppirErico Nunes2019-04-191-0/+1
* lima/ppir: support ppir_op_ceilErico Nunes2019-04-193-0/+14
* iris: Be less aggressive at postdraw work skippingKenneth Graunke2019-04-181-28/+36
* virgl/vtest: bump up protocol version + support encoded transfersGurchetan Singh2019-04-183-3/+12
* virgl/vtest: wait after issuing a transfer getGurchetan Singh2019-04-181-2/+3
* virgl/vtest: modify sending and receiving data for shared memoryGurchetan Singh2019-04-181-4/+35
* virgl/vtest: receive and handle shared memory fdGurchetan Singh2019-04-182-7/+55
* virgl/vtest: plumb support for shared memoryGurchetan Singh2019-04-183-6/+10
* virgl/vtest: add utilities for receiving fdsGurchetan Singh2019-04-181-0/+43
* virgl/vtest: execute a transfer_get when flushing the front bufferGurchetan Singh2019-04-181-22/+21
* virgl: wait after a flushGurchetan Singh2019-04-183-6/+12
* radeonsi/gfx9: use the correct condition for the DPBB + QUANT_MODE workaroundMarek Olšák2019-04-181-4/+4
* freedreno: Fix format string warningKristian H. Kristensen2019-04-181-1/+1
* freedreno/a6xx: Add helper for incrementing regidKristian H. Kristensen2019-04-181-1/+10
* freedreno: Use enum values from matching enumKristian H. Kristensen2019-04-182-3/+3
* freedreno/a2xx: Fix redundant if statementKristian H. Kristensen2019-04-181-16/+14
* iris: implement WaEnableStateCacheRedirectToCSLionel Landwerlin2019-04-181-0/+7
* Add no_aos_sampling GALLIVM_PERF optionDominik Drees2019-04-173-4/+11
* gallivm: fix saturated signed add / sub with llvm 9Roland Scheidegger2019-04-171-0/+14
* virgl: document potentially failing blitErik Faye-Lund2019-04-171-0/+6
* virgl: do color-conversion during when mapping transferErik Faye-Lund2019-04-171-10/+70
* virgl: only blit if resource is readErik Faye-Lund2019-04-171-2/+5