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* gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE.Kenneth Graunke2018-08-2416-0/+16
* Revert "configure: allow building with python3"Emil Velikov2018-08-244-4/+4
* radeonsi: increase the maximum UBO size to 2 GBMarek Olšák2018-08-231-1/+1
* radeonsi: bump MAX_GS_INVOCATIONSMarek Olšák2018-08-232-3/+3
* gallium: add PIPE_CAP_MAX_SHADER_BUFFER_SIZEMarek Olšák2018-08-2316-0/+34
* gallium: add PIPE_CAP_MAX_GS_INVOCATIONSMarek Olšák2018-08-2316-0/+35
* configure: allow building with python3Emil Velikov2018-08-234-4/+4
* llvmpipe: add cc clobber to inline asmGrazvydas Ignotas2018-08-231-1/+2
* ac: fix WAITCNT flags for GFX9Marek Olšák2018-08-221-5/+0
* ac,radeonsi: use ac_build_gather_values moreMarek Olšák2018-08-213-33/+17
* ac,radeonsi: use ac_build_fmadMarek Olšák2018-08-211-12/+5
* radeonsi: use ac_build_imadMarek Olšák2018-08-213-57/+29
* ac: add ac_build_s_barrierMarek Olšák2018-08-211-3/+1
* radeonsi: print the shader stage name when printing LLVM IRMarek Olšák2018-08-211-1/+2
* radeonsi: use is_merged shader in si_prolog_get_rw_buffersMarek Olšák2018-08-211-18/+14
* ac: completely remove +auto-waitcnt-before-barrierMarek Olšák2018-08-211-1/+0
* r600/eg: rework atomic counter emission with flushesDave Airlie2018-08-216-31/+54
* virgl: ARB_enhanced_layouts supportDave Airlie2018-08-224-3/+8
* swr: bump minimum supported LLVM version to 6.0Juan A. Suarez Romero2018-08-202-3/+3
* freedreno: fix context teardown raceRob Clark2018-08-204-8/+8
* freedreno/a6xx: streamoutRob Clark2018-08-173-45/+62
* freedreno/a6xx: fragz fixesRob Clark2018-08-171-7/+3
* freedreno/a6xx: scissor fixesRob Clark2018-08-172-4/+4
* freedreno: update generated headersRob Clark2018-08-179-27/+32
* freedreno/a6xx: fix srgbRob Clark2018-08-171-7/+13
* freedreno: fix dEQP-GLES3.functional.fence_sync.*Rob Clark2018-08-171-0/+4
* freedreno: Add a6xx backendKristian H. Kristensen2018-08-1638-17/+6368
* freedreno: update generated headersRob Clark2018-08-167-66/+4928
* freedreno: Fix warningsKristian H. Kristensen2018-08-165-15/+9
* svga: simplify Mesa version stringEric Engestrom2018-08-161-1/+1
* bin: always define MESA_GIT_SHA1 to make it directly usable in codeEric Engestrom2018-08-161-5/+1
* virgl: report actual max-texture sizesErik Faye-Lund2018-08-152-0/+10
* virgl: do not use SP_MAX_TEXTURE_*_LEVELS definesErik Faye-Lund2018-08-151-7/+3
* radv: disable the auto-waitcnt-before-barrier LLVM optionSamuel Pitoiset2018-08-151-0/+1
* radeonsi: enable 1 missing PS_SU perf counter on PolarisMarek Olšák2018-08-141-1/+1
* radeonsi: use radeon_info::nameMarek Olšák2018-08-143-40/+12
* radeonsi: split si_clear_buffer to remove enum si_methodMarek Olšák2018-08-146-53/+60
* radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policyMarek Olšák2018-08-142-26/+41
* radeonsi: declare coher in si_copy_bufferMarek Olšák2018-08-141-8/+7
* radeonsi: make PFP_SYNC_ME an explicit CP DMA flagMarek Olšák2018-08-141-17/+25
* radeonsi: don't use emit_data->args in load_emitMarek Olšák2018-08-141-94/+37
* radeonsi: don't use emit_data->args in store_emitMarek Olšák2018-08-141-92/+71
* radeonsi: don't use emit_data->args in atomic_emitMarek Olšák2018-08-143-36/+47
* radeonsi: don't use emit_data->args in build_interp_intrinsicMarek Olšák2018-08-141-19/+13
* radeonsi: inline atomic_fetch_argsMarek Olšák2018-08-141-74/+51
* radeonsi: inline store_fetch_argsMarek Olšák2018-08-141-61/+42
* radeonsi: inline load_fetch_argsMarek Olšák2018-08-141-39/+28
* radeonsi: merge txq_emit and resq_emitMarek Olšák2018-08-141-48/+45
* radeonsi: inline resq_fetch_argsMarek Olšák2018-08-141-62/+34
* radeonsi: inline txq_fetch_argsMarek Olšák2018-08-141-26/+7
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