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* panfrost: Use size0 when calculating the offset to a depth levelAlyssa Rosenzweig2020-02-042-7/+12
* panfrost: Only clamp the LOD to disable mipmapping when neededTomeu Vizoso2020-02-041-6/+7
* etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()Marek Vasut2020-02-041-0/+1
* zink: disallow depth-stencil blits with format-changeErik Faye-Lund2020-02-031-0/+4
* zink: be more careful about the mask-checkErik Faye-Lund2020-02-031-2/+4
* panfrost: Fix the damage box clamping logicBoris Brezillon2020-02-031-0/+2
* nv50: report max lod bias of 15.0Ilia Mirkin2020-02-021-1/+1
* panfrost: Fix non-debug buildsIcecream952020-02-021-0/+1
* lima: Fix build with GCC 10.Vinson Lee2020-01-311-1/+1
* freedreno/a6xx: fix lrz overflowRob Clark2020-02-011-8/+3
* gallium/swr: Fix gcc 4.8.5 compile errorKrzysztof Raszkowski2020-01-311-6/+5
* swr: Fix build with GCC 10.Vinson Lee2020-01-311-1/+3
* gallium/swr: fix gcc warningsKrzysztof Raszkowski2020-01-318-32/+34
* zink: implement support for derivative-controlErik Faye-Lund2020-01-312-0/+8
* zink: implement load_instance_idErik Faye-Lund2020-01-312-3/+22
* zink: enable texture-buffer objectsErik Faye-Lund2020-01-311-0/+6
* radeonsi: Add support for midstream bitrate change in encoderZhang, Boyuan2020-01-312-1/+17
* panfrost: Use DBG macro to avoid noise in the consoleTomeu Vizoso2020-01-316-11/+10
* panfrost: Add more info to some assertionsTomeu Vizoso2020-01-311-2/+4
* iris: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-302-6/+10
* intel/common: Return the block size from get_urb_configJason Ekstrand2020-01-301-1/+1
* iris: Consolodate URB emitJason Ekstrand2020-01-303-36/+15
* intel/blorp: Always emit URB config on Gen7+Jason Ekstrand2020-01-301-17/+3
* intel: Take a gen_l3_config in gen_get_urb_configJason Ekstrand2020-01-301-4/+1
* iris: Use the URB size from the L3$ configJason Ekstrand2020-01-303-5/+2
* iris: Store the L3$ configs in the screenJason Ekstrand2020-01-303-14/+21
* iris: Set SLMEnable based on the L3$ configJason Ekstrand2020-01-301-4/+4
* intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11Jason Ekstrand2020-01-301-1/+1
* anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+Jason Ekstrand2020-01-301-0/+4
* lima: add noheap debug optionQiang Yu2020-01-302-0/+6
* lima: create heap buffer with new interface if availableQiang Yu2020-01-306-4/+33
* lima: fix lima_set_vertex_buffers()Icenowy Zheng2020-01-301-1/+1
* etnaviv: drop default state for PE_STENCIL_CONFIG_EXT2Christian Gmeiner2020-01-291-1/+0
* freedreno: remove flush-queueRob Clark2020-01-2914-97/+24
* freedreno: add gmem_lockRob Clark2020-01-293-0/+18
* freedreno: add gmem state cacheRob Clark2020-01-295-102/+256
* freedreno: get GMEM state from batchRob Clark2020-01-297-59/+59
* freedreno/a2xx: constify gmem stateRob Clark2020-01-291-4/+4
* freedreno/a3xx: constify gmem stateRob Clark2020-01-291-9/+9
* freedreno/a4xx: constify gmem stateRob Clark2020-01-291-10/+10
* freedreno/a5xx: constify gmem stateRob Clark2020-01-291-10/+10
* freedreno/a6xx: constify gmem stateRob Clark2020-01-291-13/+13
* freedreno: constify fd_vsc_pipeRob Clark2020-01-295-9/+9
* freedreno: constify fd_tileRob Clark2020-01-298-29/+29
* freedreno: consolidate GMEM stateRob Clark2020-01-298-19/+24
* freedreno: extract vsc pipe bo from GMEM stateRob Clark2020-01-297-35/+32
* iris: Support multiple chained batches.Kenneth Graunke2020-01-292-21/+25
* iris: Make iris_emit_default_l3_config pull devinfo from the batchKenneth Graunke2020-01-291-5/+4
* iris: Drop 'engine' from iris_batch.Kenneth Graunke2020-01-293-13/+2
* etnaviv: implement UBOsJonathan Marek2020-01-299-75/+109
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