aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Expand)AuthorAgeFilesLines
* ilo: add HiZ op support to the pipelinesChia-I Wu2014-01-0811-4/+1070
* ilo: add support for HiZ allocationChia-I Wu2014-01-082-1/+82
* ilo: refactor separate stencil allocationChia-I Wu2014-01-081-20/+27
* ilo: assorted GPE fixes for HiZChia-I Wu2014-01-085-69/+67
* ilo: no layer offsetting on GEN7+Chia-I Wu2014-01-081-1/+5
* ilo: offset to layers only when necessaryChia-I Wu2014-01-084-20/+137
* ilo: allow ilo_zs_surface to skip layer offsettingChia-I Wu2014-01-083-19/+18
* ilo: allow ilo_view_surface to skip layer offsettingChia-I Wu2014-01-084-88/+72
* llvmpipe: Basic implementation of pipe_context::set_sample_mask.José Fonseca2014-01-075-7/+20
* llvmpipe: Implement alpha_to_coverage for non-MSAA framebuffers.Si Chen2014-01-073-1/+59
* radeonsi: calculate NUM_BANKS for DB correctly on CIKMarek Olšák2014-01-061-4/+19
* radeonsi: set correct pipe config for Hawaii in DBMarek Olšák2014-01-061-15/+18
* radeonsi: disable HTILE for 1D-tiled depth-stencil buffersMarek Olšák2014-01-061-0/+5
* freedreno/a3xx: fix blend state corruption issueRob Clark2013-12-268-33/+66
* freedreno: prepare for hw binningRob Clark2013-12-269-142/+159
* freedreno: resync generated headersRob Clark2013-12-266-76/+131
* r600/pipe: Stop leaking context->start_compute_cs_cmd.buf on EG/CMAaron Watry2013-12-231-0/+2
* radeon/llvm: Free target data at end of optimizationAaron Watry2013-12-231-0/+1
* r600/compute: Use the correct FREE macro when deleting compute stateAaron Watry2013-12-231-1/+1
* r600/compute: Free compiled kernels when deleting compute stateAaron Watry2013-12-231-0/+2
* radeon/compute: Stop leaking LLVMContexts in radeon_llvm_parse_bitcodeAaron Watry2013-12-235-18/+41
* llvmpipe: use pipe_sampler_view_release() to avoid segfaultJonathan Liu2013-12-221-0/+6
* radeonsi: Use htile_buffer for depth only when there is no stencil.Andreas Hartmetz2013-12-221-0/+8
* radeonsi: Only scan pixel shaders for TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFSMichel Dänzer2013-12-201-4/+7
* r600g: Fix spelling errorAaron Watry2013-12-191-1/+1
* radeonsi: set CB_DISABLE if the color mask is 0Marek Olšák2013-12-181-3/+8
* radeonsi: add the htile buffer to the CS ioctl buffer listMarek Olšák2013-12-181-0/+2
* radeonsi: improve HiZ precision for less and lequal depth functionsMarek Olšák2013-12-171-1/+7
* radeonsi: make DB_RENDER_OVERRIDE an invariant registerMarek Olšák2013-12-173-50/+3
* radeonsi: flush HTILE when appropriateMarek Olšák2013-12-173-2/+8
* freedreno: dummy-draw workaround for a320Rob Clark2013-12-142-1/+17
* r600g: expose 32-bit integer vertex formatsMarek Olšák2013-12-141-0/+1
* radeonsi: move invariant regs to si_init_configMarek Olšák2013-12-142-31/+26
* r600g: use shader-based MSAA resolving when hw-based one cannot be usedMarek Olšák2013-12-141-82/+35
* radeonsi: use shader-based MSAA resolving when hw-based one cannot be usedMarek Olšák2013-12-141-83/+35
* gallium/u_blitter: remove useless parameters from some functionsMarek Olšák2013-12-146-20/+10
* llvmpipe: get rid of barycentric calculation of a0Roland Scheidegger2013-12-141-66/+4
* llvmpipe: (trivial) get rid of triangle subdivision codeRoland Scheidegger2013-12-143-182/+1
* svga: don't emit extraneous fs shadow codeBrian Paul2013-12-131-3/+38
* swrast* (gallium, classic): add MESA_copy_sub_buffer support (v3)Dave Airlie2013-12-138-15/+21
* gallium: allow choosing which colorbuffers to clearMarek Olšák2013-12-121-1/+1
* r600g,radeonsi: fix initialized buffer range tracking for DMA, add commentsMarek Olšák2013-12-123-21/+36
* radeonsi: fix binding the dummy pixel shaderMarek Olšák2013-12-123-24/+11
* radeonsi: fix FS_COLOR0_WRITES_ALL_CBUFS with mixed colorbuffer formatsMarek Olšák2013-12-121-25/+15
* radeonsi: use the colorbuffer count from the shader keyMarek Olšák2013-12-123-16/+7
* radeonsi: remove unused variable in si_pipe_shader_psMarek Olšák2013-12-121-8/+1
* radeonsi: Write htile state to hardware.Andreas Hartmetz2013-12-123-13/+65
* radeon: Allocate htile buffer for SI in r600_texture.Andreas Hartmetz2013-12-121-15/+67
* radeon: rearrange r600_texture and related code a bit.Andreas Hartmetz2013-12-125-46/+46
* r600g,radeonsi: consolidate buffer code, add handling of DISCARD_RANGE for SIMarek Olšák2013-12-1213-353/+210
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-15 22:51:52 +0000