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path: root/src/gallium/drivers/virgl/virgl_screen.c
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* virgl: set PIPE_CAP_BLEND_EQUATION_ADVANCEDElie Tournier2020-07-171-0/+2
* gallium: add PIPE_SHADER_CAP_GLSL_16BIT_TEMPS for LowerPrecisionTemporariesMarek Olšák2020-07-071-0/+1
* gallium: Add pipe cap for primitive restart with fixed indexNeil Roberts2020-06-221-0/+1
* virgl: change vendor id to reflect reality more.Dave Airlie2020-06-171-1/+1
* gallium: add shader caps INT16 and FP16_DERIVATIVESMarek Olšák2020-06-021-0/+2
* gallium: change comments to remove 'state tracker'Marek Olšák2020-05-131-1/+1
* virgl: Enable CAP_CLEAR_TEXTURE if host supports itElie Tournier2020-05-071-1/+2
* virgl: Use ETC2 formats directly when possible.Lepton Wu2020-04-161-0/+3
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-141-2/+2
* virgl: Remove formats with unusual sample count.Lepton Wu2019-10-241-0/+3
* gallium: remove PIPE_SHADER_CAP_SCALAR_ISAMarek Olšák2019-10-101-2/+0
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-08-261-4/+6
* virgl: check scanout maskGurchetan Singh2019-08-081-0/+6
* virgl: fixup_readback_format --> fixup_formatsGurchetan Singh2019-08-081-8/+7
* virgl: access caps in a less verbose way in virgl_is_format_supportedGurchetan Singh2019-08-081-9/+9
* virgl: Enable depth_clamp by lowering if the host is new enough.Gert Wollny2019-08-011-1/+5
* virgl: make use of local variableEric Engestrom2019-07-311-1/+1
* gallium: switch boolean -> bool at the interface definitionsIlia Mirkin2019-07-221-35/+35
* gallium: get rid of PIPE_CAP_SM3Erik Faye-Lund2019-07-101-1/+3
* virgl: add VIRGL_DEBUG_XFERChia-I Wu2019-06-251-0/+1
* virgl: add VIRGL_DEBUG_SYNCChia-I Wu2019-06-251-0/+1
* virgl: fix the value of VIRGL_DEBUG_BGRA_DEST_SWIZZLEChia-I Wu2019-06-251-4/+4
* virgl: Add debug flag to bypass driconf to enable the BGRA tweaksGert Wollny2019-06-201-0/+5
* virgl: Add a tweak to set the value for emulated queries of GL_SAMPLES_PASSEDGert Wollny2019-06-201-0/+5
* virgl: Add tweak to apply a swizzle when drawing/blitting to a emulated BGRA ...Gert Wollny2019-06-201-0/+3
* virgl: Add driconf tweak for emulating BGRA surfaces on GLESGert Wollny2019-06-201-0/+7
* virgl: Add override for BGRA format to use swizzled SRGB formatGert Wollny2019-06-201-0/+6
* virgl: Add code to accept BGRx_SRGB as RGBx_SRGBGert Wollny2019-06-201-3/+22
* virgl: factor out format host bits checkGert Wollny2019-06-201-16/+17
* gallium/virgl: Add code path for virgl to read driconfGert Wollny2019-06-201-1/+1
* virgl: Assume sRGB write control for older guest kernels or virglrenderer hostsGert Wollny2019-06-171-1/+2
* virgl: Enable CAP_CLIP_HALFZ if host supports itGert Wollny2019-06-061-1/+2
* gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH countKenneth Graunke2019-05-231-2/+3
* gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.Eric Anholt2019-05-131-3/+3
* virgl: get readback-formats from hostErik Faye-Lund2019-04-171-0/+40
* virgl: Enable passing arrays as input to fragment shadersGert Wollny2019-04-101-0/+5
* virgl: add support for ARB_indirect_parametersDave Airlie2019-04-091-1/+2
* virgl: add support for ARB_multi_draw_indirectDave Airlie2019-04-091-1/+2
* virgl: define MAX_VERTEX_STREAMS based on availability of TF3Gert Wollny2019-04-021-1/+2
* virgl: stricter usage of compressed 3d texturesErik Faye-Lund2019-04-021-0/+6
* virgl: do not allow compressed formats for buffersErik Faye-Lund2019-04-021-0/+3
* virgl: Add a caps feature check versionGert Wollny2019-03-291-1/+2
* virgl: Fake MSAA when max samples is 1Alexandros Frantzis2019-03-271-1/+4
* virgl: Set PIPE_CAP_DOUBLES when running on GLES This is a lie but no known a...Elie Tournier2019-03-091-1/+2
* virgl: Enable mixed color FBO attachemnets only when the host supportsGert Wollny2019-02-221-1/+1
* gallium: add PIPE_CAP_MAX_VARYINGSKarol Herbst2019-02-071-0/+4
* virgl: ARB_query_buffer_object supportDave Airlie2019-01-311-1/+2
* virgl: enable elapsed time queriesDave Airlie2019-01-311-1/+1
* virgl: Set sRGB write control CAP based on host capabilitiesGert Wollny2019-01-281-0/+2
* virgl: texture_transfer_pool --> transfer_poolGurchetan Singh2018-12-191-2/+2
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