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path: root/src/gallium/drivers/radeonsi
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* radeonsi: use a threaded context even for debug contextsNicolai Hähnle2017-11-091-9/+2
* radeonsi: record and dump time of flushNicolai Hähnle2017-11-093-1/+8
* radeonsi: implement PIPE_FLUSH_{TOP,BOTTOM}_OF_PIPENicolai Hähnle2017-11-091-1/+88
* radeonsi: document some subtle details of fence_finish & fence_server_syncNicolai Hähnle2017-11-091-0/+22
* gallium/u_threaded: implement asynchronous flushesNicolai Hähnle2017-11-093-25/+84
* radeonsi: move fence functions to si_fence.cNicolai Hähnle2017-11-095-0/+312
* radeonsi: always use async compiles when creating shader/compute statesNicolai Hähnle2017-11-092-34/+50
* radeonsi: fix potential use-after-free of debug callbacksNicolai Hähnle2017-11-091-0/+4
* radeonsi: move pipe debug callback to si_contextNicolai Hähnle2017-11-094-6/+19
* radeonsi: reduce the scope of sel->mutex in si_shader_select_with_keyNicolai Hähnle2017-11-091-4/+4
* radeonsi: use ready fences on all shaders, not just optimized onesNicolai Hähnle2017-11-093-26/+67
* radeonsi: add si_screen::has_ls_vgpr_init_bugMarek Olšák2017-11-074-3/+5
* radeonsi: use ac_create_target_machineMarek Olšák2017-11-071-15/+7
* radeonsi: use ac_get_llvm_processor_nameMarek Olšák2017-11-071-2/+2
* radeonsi/gfx9: don't set gs_table_depthMarek Olšák2017-11-071-2/+4
* radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven onlyMarek Olšák2017-11-071-4/+4
* radeonsi: enable signed vertex buffer offsetsMarek Olšák2017-11-062-15/+12
* gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSETMarek Olšák2017-11-061-0/+1
* ac/radeonsi: add support for tex instr without a derefenceTimothy Arceri2017-11-031-0/+5
* radeonsi: remove 'Authors:' commentsMarek Olšák2017-11-0219-66/+0
* gallium: add cap for driver specified max combined shader resources.Dave Airlie2017-11-011-0/+1
* radeonsi: fix culldist_writemask in nir pathTimothy Arceri2017-11-011-2/+1
* radeonsi: update hack for HTILE corruption in ARK: Survival EvolvedSamuel Pitoiset2017-10-274-9/+9
* radeonsi: add a workaround for weird s_buffer_load_dword behavior on SIMarek Olšák2017-10-261-3/+10
* ac/llvm: consolidate find lsb function.Dave Airlie2017-10-261-25/+2
* ac/nir: move lds declaration/load/store into shared code.Dave Airlie2017-10-262-16/+5
* radeonsi: postponed KILL isn't postponed anymore, but maintains WQMMarek Olšák2017-10-241-0/+6
* radeonsi: use postponed KILL only when derivatives are usedMarek Olšák2017-10-244-3/+9
* ac: replace ac_build_kill with ac_build_kill_if_falseMarek Olšák2017-10-242-52/+38
* ac/nir: Only clamp shadow reference on radeonsi.Bas Nieuwenhuizen2017-10-231-0/+1
* radeonsi: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-7/+14
* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-201-11/+11
* radeonsi: if there's just const buffer 0, set it in place of CONST/SSBO pointerMarek Olšák2017-10-174-13/+87
* ac: clean up ac_build_indexed_load function interfacesMarek Olšák2017-10-172-19/+19
* radeonsi: handle 64-bit loads earlier in fetch_constantMarek Olšák2017-10-171-16/+10
* radeonsi: add si_descriptors::gpu_address and remove buffer_offsetMarek Olšák2017-10-173-14/+18
* radeonsi: unify code for extracting a buffer address from a descriptorMarek Olšák2017-10-171-4/+7
* radeonsi: remove atom parameter from si_upload_descriptorsMarek Olšák2017-10-171-8/+4
* radeonsi: pack si_descriptors better againMarek Olšák2017-10-171-2/+2
* radeonsi: emit dirty consecutive pointers in one SET_SH_REG packetMarek Olšák2017-10-171-27/+39
* radeonsi: split si_emit_shader_pointerMarek Olšák2017-10-171-11/+23
* radeonsi: generalize the SI_VS_SHADER_POINTER_MASK macroMarek Olšák2017-10-173-4/+4
* radeonsi/gfx9: use SPI_SHADER_USER_DATA_COMMONMarek Olšák2017-10-171-13/+13
* radeonsi/gfx9: move RW_BUFFERS from s[0:1] to s[8:9] for HS and GSMarek Olšák2017-10-172-39/+16
* meson: build radeonsi gallium driverDylan Baker2017-10-161-1/+1
* meson: build radeonsiDylan Baker2017-10-161-0/+78
* radeonsi: implement sync_file import/exportMarek Olšák2017-10-121-1/+3
* radeonsi: add support for PIPE_FORMAT_{X1,A1}R5G5B5_UNORMNicolai Hähnle2017-10-121-0/+8
* radeonsi: lower ffma in nir to mad.Dave Airlie2017-10-111-0/+1
* gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.Eric Anholt2017-10-101-0/+1
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