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* radeonsi: shrink the GSVS ring to account for the reduced item sizesNicolai Hähnle2016-12-121-1/+1
* radeonsi: shrink each vertex stream to the actually required sizeNicolai Hähnle2016-12-122-25/+40
* radeonsi: use a single descriptor for the GSVS ringNicolai Hähnle2016-12-124-50/+67
* radeonsi: pack GS output components for each vertex stream contiguouslyNicolai Hähnle2016-12-121-3/+8
* radeonsi: do not write non-existent components through the GSVS ringNicolai Hähnle2016-12-121-2/+4
* radeonsi: only write values belonging to the stream when emitting GS vertexNicolai Hähnle2016-12-121-0/+3
* radeonsi: generate an explicit switch instruction over vertex streamsNicolai Hähnle2016-12-121-8/+13
* radeonsi: fetch only outputs of current vertex stream from the GSVS ringNicolai Hähnle2016-12-121-16/+25
* radeonsi: only export from GS copy shader for vertex stream 0Nicolai Hähnle2016-12-121-12/+19
* radeonsi: do not export VS outputs from vertex streams != 0Nicolai Hähnle2016-12-121-0/+6
* radeonsi: pull iteration over vertex streams into GS copy shader logicNicolai Hähnle2016-12-121-25/+37
* radeonsi: group streamout writes by vertex streamNicolai Hähnle2016-12-121-10/+22
* radeonsi: load the streamout buf descriptors closer to their useNicolai Hähnle2016-12-121-14/+11
* radeonsi: extract writing of a single streamout outputNicolai Hähnle2016-12-121-39/+52
* radeonsi: separate the call to si_llvm_emit_streamout from exportsNicolai Hähnle2016-12-121-4/+4
* radeonsi: plumb the output vertex_stream through to si_shader_output_valuesNicolai Hähnle2016-12-121-1/+9
* radeonsi: rename members of si_shader_output_valuesNicolai Hähnle2016-12-121-8/+8
* radeonsi: fix an off-by-one error in the bounds check for max_verticesNicolai Hähnle2016-12-121-1/+1
* radeonsi: do not kill GS with memory writesNicolai Hähnle2016-12-121-8/+22
* radeonsi: update all GSVS ring descriptors for new buffer allocationsNicolai Hähnle2016-12-121-1/+6
* radeonsi: fix release build unused variable warningsGrazvydas Ignotas2016-12-102-2/+2
* radeonsi: disable the constant engine (CE) on Carrizo and StoneyMarek Olšák2016-12-081-1/+4
* radeonsi: Fix typo: "llvm.fs.interp" => "llvm.SI.fs.interp"Michel Dänzer2016-12-081-1/+1
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-071-1/+17
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-071-1/+5
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-071-5/+7
* radeonsi: write shader descriptors into hang reportsMarek Olšák2016-12-073-0/+117
* radeonsi: check for sampler state CSO corruptionMarek Olšák2016-12-073-0/+17
* radeonsi: properly declare context sampler statesMarek Olšák2016-12-073-4/+4
* radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-071-4/+4
* radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-071-3/+8
* radeonsi: take LDS into account for compute shader occupancy statsMarek Olšák2016-12-071-11/+18
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-071-4/+12
* radeonsi: Use amdgcn intrinsics for fs interpolationTom Stellard2016-12-071-54/+142
* gallium: support for native fence fd'sRob Clark2016-12-011-0/+1
* radeonsi: add a tess+GS hang workaround for VI dGPUsMarek Olšák2016-12-011-2/+10
* radeonsi: don't apply the Z export bug workaround to HainanMarek Olšák2016-12-011-2/+3
* radeonsi: apply a tessellation bug workaround for SIMarek Olšák2016-12-011-0/+7
* radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-011-11/+23
* radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-014-4/+29
* radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-011-24/+19
* gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTSNicolai Hähnle2016-11-301-0/+1
* radeonsi: don't fetch 8 dwords for samplerBuffer and imageBufferMarek Olšák2016-11-291-51/+43
* radeonsi: disable XNACK to free 2 SGPRs on APUsMarek Olšák2016-11-291-1/+1
* radeonsi: count and report temp arrays in scratch separatelyMarek Olšák2016-11-292-4/+40
* radeonsi: don't try to eliminate trivial VS outputs for PS and CSMarek Olšák2016-11-291-1/+4
* radeonsi: disable RB+ blend optimizations for dual source blendingMarek Olšák2016-11-291-0/+11
* radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blendingMarek Olšák2016-11-291-0/+4
* radeonsi: always set all blend registersMarek Olšák2016-11-291-5/+5
* radeonsi: set the smallest possible CB_TARGET_MASKMarek Olšák2016-11-291-5/+5