aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_pipe.c
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: enable support for EXT_memory_objectAndres Rodriguez2017-08-061-1/+1
* radeonsi: hook up device/driver UUID queriesAndres Rodriguez2017-08-061-0/+14
* radeonsi: set drirc compiler options before calling common screen initNicolai Hähnle2017-08-041-4/+10
* gallium: introduce PIPE_CAP_MEMOBJTimothy Arceri2017-08-031-0/+1
* radeonsi: add enable_sisched driconf optionNicolai Hähnle2017-08-021-0/+4
* gallium: add pipe_screen_config to screen_create functionsNicolai Hähnle2017-08-021-2/+2
* radeonsi: enable ARB_transform_feedback_overflow_queryNicolai Hähnle2017-08-021-1/+1
* gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding capNicolai Hähnle2017-08-021-0/+1
* radeonsi: enable R600_DEBUG=nir for vertex and fragment shadersNicolai Hähnle2017-07-311-0/+6
* radeonsi: implement pipe_screen::get_compiler_options for NIRNicolai Hähnle2017-07-311-0/+33
* gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREFNicolai Hähnle2017-07-311-0/+1
* radeonsi: decrease the number of compiler threadsMarek Olšák2017-07-261-1/+1
* radeonsi: fix detection of DRAW_INDIRECT_MULTI on SINicolai Hähnle2017-07-261-2/+2
* radeonsi: add back the USE_MININUM_PRIORITY flag to the low-prio compiler queueMarek Olšák2017-07-181-1/+2
* radeonsi: automatically resize shader compiler thread queues when they are fullMarek Olšák2017-07-171-8/+4
* radeonsi: expose ARB_timer_query unconditionallyMarek Olšák2017-07-171-5/+2
* radeonsi: prevent a crash with DBG_CHECK_VM and u_threaded_contextMarek Olšák2017-07-171-4/+6
* radeonsi/gfx9: add workarounds to avoid VGPR indexing completelyMarek Olšák2017-07-171-6/+19
* radeonsi: merge si_llvm_get_amdgpu_target into ac_get_llvm_targetMarek Olšák2017-07-171-1/+1
* radeonsi: move instance divisors into a constant bufferMarek Olšák2017-06-271-0/+2
* gallium/radeon: pass create_screen flags to r600_common_screen_initMarek Olšák2017-06-231-2/+3
* radeonsi/gfx9: keep reusing the same buffer/address for the gfx9 flush fenceMarek Olšák2017-06-221-0/+18
* radeonsi/gfx9: enable the constant engineMarek Olšák2017-06-221-4/+1
* radeonsi/gfx9: indirect buffers and all CP packets use TC L2Marek Olšák2017-06-221-2/+4
* radeonsi/gfx9: disable sparse buffersMarek Olšák2017-06-191-0/+3
* radeonsi: reduce overhead for resident textures which need color decompressionSamuel Pitoiset2017-06-181-0/+4
* radeonsi: reduce overhead for resident textures which need depth decompressionSamuel Pitoiset2017-06-181-0/+2
* radeonsi: enable ARB_bindless_textureSamuel Pitoiset2017-06-141-1/+3
* radeonsi: implement ARB_bindless_textureSamuel Pitoiset2017-06-141-0/+15
* radeonsi: add a slab allocator for bindless descriptorsSamuel Pitoiset2017-06-141-0/+12
* gallium: add PIPE_CAP_BINDLESS_TEXTURESamuel Pitoiset2017-06-141-0/+1
* radeonsi: clean up decompress blend state namesMarek Olšák2017-06-071-4/+4
* radeonsi: use a compiler queue with a low priority for optimized shadersMarek Olšák2017-06-071-4/+27
* util/u_queue: add an option to set the minimum thread priorityMarek Olšák2017-06-071-1/+1
* radeonsi: decrease the number of compiler threads to num CPUs - 1Marek Olšák2017-06-071-1/+4
* gallium: Add a cap to check if the driver supports ARB_post_depth_coverageLyude2017-06-021-0/+1
* radeonsi: fix a crash in si_destroy_context if we fail earlyMarek Olšák2017-05-291-1/+2
* radeon: rename has_uvd info to has_hw_decodeLeo Liu2017-05-251-1/+1
* radeonsi/gfx9: compile shaders with +xnackMarek Olšák2017-05-221-6/+7
* radeonsi: do only 1 big CE dump at end of IBs and one reload in the preambleMarek Olšák2017-05-181-0/+1
* gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTIONMarek Olšák2017-05-171-0/+1
* radeonsi: enable threaded_contextMarek Olšák2017-05-151-3/+34
* gallium/radeon: unwrap a context if we get a wrapped oneMarek Olšák2017-05-151-1/+1
* radeonsi/gfx9: add support for RavenMarek Olšák2017-05-151-2/+5
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-101-0/+1
* radeonsi: drop support for LLVM 3.8Marek Olšák2017-05-051-14/+7
* radeonsi: remove VS epilog code, compile VS with PrimID export on demandMarek Olšák2017-04-281-1/+0
* radeonsi/gfx9: enable OpenGL 4.5Marek Olšák2017-04-281-5/+0
* radeonsi: disable the TGSI merge registers passSamuel Pitoiset2017-04-261-1/+1
* gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset2017-04-261-0/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 21:05:30 +0000