aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_perfcounter.c
Commit message (Collapse)AuthorAgeFilesLines
* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-191-6/+6
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: don't expose performance counters for non-existent blocksMarek Olšák2018-06-191-13/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: remove r600_common_contextMarek Olšák2018-04-051-7/+7
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move r600_query.c/h files to si_query.c/hMarek Olšák2018-04-051-1/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.hMarek Olšák2018-04-051-3/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename query definitions R600_ -> SI_Marek Olšák2018-04-051-13/+13
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename r600 -> si in some placesMarek Olšák2018-04-051-4/+4
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: update copyrightsMarek Olšák2018-04-051-0/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: switch radeon_add_to_buffer_list parameter to si_contextMarek Olšák2018-04-051-1/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt5Marek Olšák2018-04-051-13/+12
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt2Marek Olšák2018-04-051-5/+6
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: flatten / remove struct r600_ringMarek Olšák2018-04-051-7/+7
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove unused query codeMarek Olšák2018-04-051-32/+0
| | | | | | The get_size perf counter callback is also inlined and removed. Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_common_screenMarek Olšák2017-11-291-10/+10
| | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove some definitions and helpers from r600_pipe_common.hMarek Olšák2017-11-291-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose all CB performance counters on StoneyMarek Olšák2017-11-251-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove 'Authors:' commentsMarek Olšák2017-11-021-4/+0
| | | | | | | It's inaccurate. Instead, see the copyright and use "git log" and "git blame" to know the authorship. Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: shrink r600d_common.h and stop using itMarek Olšák2017-10-091-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* r600: fork and import gallium/radeonMarek Olšák2017-09-261-7/+7
| | | | | | | | | | | This marks the end of code sharing between r600 and radeonsi. It's getting difficult to work on radeonsi without breaking r600. A lot of functions had to be renamed to prevent linker conflicts. There are also minor cleanups. Acked-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: clean up EOP_DATA_SEL magic numbersMarek Olšák2017-08-221-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: set 'not a query' for r600_gfx_write_event_eop correctlyMarek Olšák2017-08-221-1/+1
| | | | | | 0 is PIPE_QUERY_OCCLUSION_COUNTER, which is not what we want. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add performance countersNicolai Hähnle2017-08-221-1/+28
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove old_fence parameter from r600_gfx_write_event_eopMarek Olšák2017-08-181-1/+1
| | | | | | just use the new scratch buffer. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: prevent a GPU hang after a timestamp eventMarek Olšák2017-08-181-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* Revert "radeonsi: constify a bunch of the perfcounter structs."Marek Olšák2017-05-061-43/+49
| | | | | | | This reverts commit 7088b655e8828bb960f528dd33132de27c505b8f. It breaks performance counters. If you use them with this commit, they hang the machine hard. Sysrq and ssh don't work.
* Revert "radeonsi: fix build with GCC 4.8"Marek Olšák2017-05-061-1/+1
| | | | | | This reverts commit 485ece83aceb3a35792efbc6fe2bca57ba46c04a. It's needed to revert 7088b655e8828bb960f528dd33132de27c505b8f.
* radeonsi: fix build with GCC 4.8Samuel Pitoiset2017-05-051-1/+1
| | | | | | | Fixes: 7088b655e8 ("radeonsi: constify a bunch of the perfcounter structs.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100937 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: constify a bunch of the perfcounter structs.Dave Airlie2017-05-041-49/+43
| | | | | | | | This moves the structs from the data segment to the rodata segment, which seems like the more correct place for them. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/gfx9: handle GFX9 in a few placesMarek Olšák2017-03-301-0/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make r600_gfx_write_fence more genericMarek Olšák2016-10-261-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove unnecessary #includesMarek Olšák2016-10-041-1/+0
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: emit relocations for query fencesNicolai Hähnle2016-09-301-1/+1
| | | | | | | | | This is only needed for r600 which doesn't have ARB_query_buffer_object and therefore wouldn't really need the fences, but let's be optimistic about filling in this feature gap eventually. Cc: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: add r600_gfx_{write,wait}_fenceNicolai Hähnle2016-09-291-38/+3
| | | | | | | For bottom-of-pipe fences inside the gfx command stream. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: really wait for the second EOP event and not the first oneMarek Olšák2016-07-191-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose performance counters as 64 bitNicolai Hähnle2016-05-091-5/+8
| | | | | | | This is useful for shader-related counters, since they tend to quickly exceed 32 bits. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't flush CB/DB caches for performance countersMarek Olšák2016-04-181-3/+6
| | | | | | | | I'm not sure about this. This will make the engines go idle, but the caches will be unflushed. This should match app behavior without performance counters, which can be a good thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add placeholder MC and SRBM performance counter groupsNicolai Hähnle2016-02-051-16/+54
| | | | | | | | | | Yet another change motivated by AMD GPUPerfStudio compatibility. These groups are not directly accessible from userspace, and AMD GPUPerfStudio does not actually query them - it just requires them to be there. Hence, adding a placeholder for now. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Marek Olšák <[email protected]>
* radeonsi: re-order the SQ_xx performance counter blocksNicolai Hähnle2016-02-051-0/+21
| | | | | | | | This is yet another change motivated by appeasing AMD GPUPerfStudio's hardcoding of performance counter group numbers. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Marek Olšák <[email protected]>
* radeonsi: re-order the perfcounter hardware blocksNicolai Hähnle2016-02-051-12/+18
| | | | | | | | | As documented in the comment, AMD GPUPerfStudio unfortunately hardcodes the order of performance counter groups. Let's do the pragmatic thing and present the same order as Catalyst/Crimson. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Marek Olšák <[email protected]>
* radeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layoutsNicolai Hähnle2015-12-151-1/+1
| | | | | | The incorrectly computed register count caused lockups. Reviewed-by: Edward O'Callaghan <[email protected]>
* radeon: delay the generation of driver query names until first useNicolai Hähnle2015-11-261-8/+7
| | | | | | | This shaves a bit more time off the startup of programs that don't actually use performance counters. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: implement AMD_performance_monitor for CIK+Nicolai Hähnle2015-11-251-0/+695
Expose most of the performance counter groups that are exposed by Catalyst. Ideally, the driver will work with GPUPerfStudio at some point, but we are not quite there yet. In any case, this is the reason for grouping multiple instances of hardware blocks in the way it is implemented. The counters can also be shown using the Gallium HUD. If one is interested to see how work is distributed across multiple shader engines, one can set the environment variable RADEON_PC_SEPARATE_SE=1 to obtain finer-grained performance counter groups. Part of the implementation is in radeon because an implementation for older hardware would largely follow along the same lines, but exposing a different set of blocks which are programmed slightly differently. Reviewed-by: Marek Olšák <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 17:22:22 +0000