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* radeonsi: rename si_hw_context.c -> si_gfx_cs.cMarek Olšák2018-04-051-299/+0
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move si_destroy_saved_cs to si_debug.cMarek Olšák2018-04-051-7/+0
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_begin_new_cs -> si_begin_new_gfx_csMarek Olšák2018-04-051-4/+4
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_need_cs_space -> si_need_gfx_cs_spaceMarek Olšák2018-04-051-1/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use num_cs_dw_queries_suspendMarek Olšák2018-04-051-2/+6
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: call CS flush functions directly whenever possibleMarek Olšák2018-04-051-5/+5
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: don't use struct si_descriptors for vertex buffer descriptorsMarek Olšák2018-02-261-1/+1
| | | | | | VBO descriptor code will change a lot one day. Reviewed-by: Nicolai Hähnle <[email protected]>
* r300,r600,radeonsi: replace RADEON_FLUSH_* with PIPE_FLUSH_*Marek Olšák2017-11-291-3/+3
| | | | | | and handle PIPE_FLUSH_HINT_FINISH in r300. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_common_screenMarek Olšák2017-11-291-2/+2
| | | | | | | | | | Most files in gallium/radeon now include si_pipe.h. chip_class and family are now here: sscreen->info.family sscreen->info.chip_class Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove more functions from r600_pipe_common.cMarek Olšák2017-11-291-2/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove R600_CONTEXT_* flagsMarek Olšák2017-11-291-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove some definitions and helpers from r600_pipe_common.hMarek Olšák2017-11-291-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: avoid syncing the driver thread in si_fence_finishNicolai Hähnle2017-11-201-0/+3
| | | | | | It is really only required when we need to flush for deferred fences. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: record and dump time of flushNicolai Hähnle2017-11-091-0/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: remove 'Authors:' commentsMarek Olšák2017-11-021-3/+0
| | | | | | | It's inaccurate. Instead, see the copyright and use "git log" and "git blame" to know the authorship. Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: import r600_streamout from drivers/radeonMarek Olšák2017-10-091-1/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enumerize DBG flagsMarek Olšák2017-10-091-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move and rename scissor and viewport state and functionsNicolai Hähnle2017-10-021-5/+5
| | | | | | v2: change GET_MAX_SCISSOR to SI_MAX_SCISSOR Reviewed-by: Marek Olšák <[email protected]>
* r600: fork and import gallium/radeonMarek Olšák2017-09-261-5/+5
| | | | | | | | | | | This marks the end of code sharing between r600 and radeonsi. It's getting difficult to work on radeonsi without breaking r600. A lot of functions had to be renamed to prevent linker conflicts. There are also minor cleanups. Acked-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: implement primitive binningMarek Olšák2017-09-051-0/+2
| | | | | | | This increases performance, but it was tuned for Raven, not Vega. We don't know yet how Vega will perform, hopefully not worse. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove Constant Engine supportMarek Olšák2017-08-221-49/+2
| | | | | | | | We have come to the conclusion that it doesn't improve performance. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: print saved CS to the log contextNicolai Hähnle2017-08-221-21/+46
| | | | | | | | | | | | Use the auto logger facility, so that CS chunks will be interleaved with other log info. v2: - fix some crashes when not using CE - fix skipping "previous" chunks of current (unflushed) IB - fix error handling in si_begin_cs_debug Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't prefetch VBO descriptors if vertex elements == NULLMarek Olšák2017-08-211-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use CLEAR_STATE on SIMarek Olšák2017-08-181-7/+13
| | | | | | | | | This fixes random hangs with Unigine Valley. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102201 Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some registers") Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a separate dirty mask for prefetchesMarek Olšák2017-08-071-2/+14
| | | | | | | | | | so that we don't rely on si_pm4_state_enabled_and_changed, allowing us to move prefetches after draw calls. v2: ckear the dirty mask after unbinding shaders Tested-by: Dieter Nützel <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: de-atomize L2 prefetchMarek Olšák2017-08-071-1/+1
| | | | | | | I'd like to be able to move the prefetch call site around. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: print CE IBs into ddebug reportsMarek Olšák2017-08-011-4/+6
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rely on CLEAR_STATE for clearing UCP and blend color registersMarek Olšák2017-07-281-2/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rely on CLEAR_STATE for resetting the framebuffer and sample maskMarek Olšák2017-07-281-3/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* Revert "radeonsi: don't emit partial flushes at the end of IBs (v2)"Marek Olšák2017-06-231-9/+5
| | | | | | | This reverts commit c9040dc9e75c81024f88f3f1bab821ad2bc73db3. People have reported it causes corruption on VI, and I see GPU hangs on GFX9.
* radeonsi: don't emit partial flushes at the end of IBs (v2)Marek Olšák2017-06-221-5/+9
| | | | | | | | The kernel sort of does the same thing with fences. v2: do emit partial flushes on SI Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add all resident buffers to the current CSSamuel Pitoiset2017-06-141-0/+1
| | | | | | | | | | | Resident buffers have to be added to every new command stream. Though, this could be slightly improved when current shaders don't use any bindless textures/images but usually applications tend to use bindless for almost every draw call, and the winsys thread might help when buffers are added early. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: update si_ce_needed_cs_spaceMarek Olšák2017-05-181-8/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: do only 1 big CE dump at end of IBs and one reload in the preambleMarek Olšák2017-05-181-2/+6
| | | | | | | | A later commit will only upload descriptors used by shaders, so we won't do full dumps anymore, so the only way to have a complete mirror of CE RAM in memory is to do a separate dump after the last draw call. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: always flush asynchronously and wait after begin_new_csMarek Olšák2017-04-171-0/+3
| | | | | | | | | | This hides the overhead of everything in the driver after the CS flush and before returning from pipe_context::flush. Only microbenchmarks will benefit. +2% FPS for glxgears. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: emit VS_STATE register explicitly from si_draw_vboNicolai Hähnle2017-04-131-0/+1
| | | | | | We will merge other derived state information into this register. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: atomize the scratch buffer stateMarek Olšák2017-01-301-1/+6
| | | | | | | | | The update frequency is very low. Difference: Only account for the size when allocating a new one and when starting a new IB, and check for NULL. (v3) Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move VGT_VERTEX_REUSE_BLOCK_CNTL into shader states for PolarisMarek Olšák2017-01-301-1/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: atomize L2 prefetchesMarek Olšák2017-01-301-0/+3
| | | | | | to move the big conditional statement out of draw_vbo Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: turn SDMA IBs into de-facto preambles of GFX IBsMarek Olšák2017-01-051-4/+16
| | | | | | | | | | Draw calls no longer flush SDMA IBs. r600_need_dma_space is responsible for synchronizing execution between both IBs. Initial buffer clears and fast clears will stay unflushed in the SDMA IB (up to 64 MB) as long as the GFX IB isn't flushed either. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using PIPE_BIND_CUSTOMMarek Olšák2016-10-261-1/+1
| | | | | | it has no effect whatsoever Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: implement set_device_reset_callbackNicolai Hähnle2016-10-051-0/+3
| | | | | | | | | Check for device reset on flush. It would be nicer if the kernel just reported this as an error on the submit ioctl (and similarly for fences), but this will do for now. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move VGT_LS_HS_CONFIG to derived tess_stateMarek Olšák2016-10-041-1/+0
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: remove the cache_flush atomMarek Olšák2016-09-091-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: skip redundant INDEX_TYPE writesMarek Olšák2016-09-071-0/+1
| | | | | | Ported from Vulkan. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: set VPORT_ZMIN/MAX registers correctlyMarek Olšák2016-09-051-0/+1
| | | | | | | | | | | | Calculate depth ranges from viewport states and pipe_rasterizer_state::clip_halfz. The evergreend.h change is required to silence a warning. This fixes this recently updated piglit: arb_depth_clamp/depth-clamp-range Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: unify and simplify checking for an empty gfx IBMarek Olšák2016-08-251-10/+3
| | | | | | | We can take advantage of the fact that multi_fence does the obvious thing with NULL fences. This fixes unflushed fences that can get stuck due to empty IBs.
* gallium/radeon: count gfx IB flushesMarek Olšák2016-08-061-1/+1
| | | | | | | This will be used as a counter for whether fence_finish needs to flush the IB. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move radeon_winsys::cs_memory_below_limit to driversMarek Olšák2016-08-061-2/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: move last_gfx_fence from radeonsi to common codeMarek Olšák2016-08-031-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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