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* radeon/llvm: Lower implicit parameters before ISelTom Stellard2012-08-163-69/+42
* radeon/llvm: Enable if-cvtVincent Lejeune2012-08-151-0/+3
* radeon/llvm: Add callbacks needed by if-cvtVincent Lejeune2012-08-152-2/+151
* radeon/llvm: Lower branch/branch_cond into predicated jumpVincent Lejeune2012-08-157-145/+278
* radeon/llvm: Add a predicated JUMP instructionVincent Lejeune2012-08-151-0/+9
* radeon/llvm: Support for predicate bitVincent Lejeune2012-08-158-13/+125
* radeon/llvm: add support to fetch temps as vectorsChristian König2012-08-151-1/+11
* radeon/llvm: Remove AMDGPUUtil.cppTom Stellard2012-08-158-81/+22
* radeon/llvm: Cleanup AMDGPUUtil.cppApostolos Bartziokas2012-08-156-119/+95
* radeon/llvm: Lower loads from USE_SGPR adddress space during DAG loweringTom Stellard2012-08-155-66/+50
* radeon/llvm: Add live-in registers during DAG loweringTom Stellard2012-08-158-64/+79
* radeon/llvm: Lower store_output intrinsic during DAG loweringTom Stellard2012-08-153-22/+22
* radeon/llvm: Force VTX_READ instructions to use same reg for src and dstTom Stellard2012-08-151-0/+14
* radeon/llvm: Inline immediate offset when lowering implicit parametersTom Stellard2012-08-141-4/+8
* radeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32Tom Stellard2012-08-141-1/+4
* radeon/llvm: Add $(LLVM_LDFLAGS) to the loader linker flagsTom Stellard2012-08-021-1/+1
* radeon/llvm: Add support for more f32 CMP instructions on SITom Stellard2012-08-021-5/+15
* radeon/llvm: Add support for fneg on SITom Stellard2012-08-022-0/+16
* radeon/llvm: Add support for fp_to_sint on SITom Stellard2012-08-021-1/+3
* radeon/llvm: Remove CMOVLOG DAG nodeTom Stellard2012-08-026-75/+9
* radeonsi: Handle TGSI DIV opcode.Michel Dänzer2012-08-021-0/+5
* radeon/llvm: fix fp immediates on SIChristian König2012-08-021-7/+20
* radeon/llvm: fix calculation of max register numberChristian König2012-08-011-1/+1
* radeon/llvm: Add pseudo-support for 64-bit immediate types on SITom Stellard2012-07-312-0/+23
* radeon/llvm: Fix incorrect return value in SelectADDRReg()Tom Stellard2012-07-311-1/+1
* radeon/llvm: Move SMRD IMM pattern before SMRD SGPR patternTom Stellard2012-07-311-7/+6
* radeon/llvm: Cleanup AMDIL.hTom Stellard2012-07-304-91/+26
* radeon/llvm: Rename all AMDIL* classes to AMDGPU*Tom Stellard2012-07-3030-496/+496
* radeon/llvm: Merge AMDILSubtarget into AMDGPUSubtargetTom Stellard2012-07-3025-324/+156
* radeon/llvm: Merge AMDILTargetLowering class into AMDGPUTargetLoweringTom Stellard2012-07-3011-241/+144
* radeon/llvm: Remove IL_cmp DAG nodeTom Stellard2012-07-304-502/+2
* radeon/llvm: Cleanup and reorganize AMDIL .td filesTom Stellard2012-07-3013-2303/+335
* radeon/llvm: Remove lowering code for unsupported featuresTom Stellard2012-07-308-805/+50
* radeon/llvm: Remove AMDILVersion.tdTom Stellard2012-07-302-59/+0
* radeon/llvm: Remove AMDILAlgorithms.tppTom Stellard2012-07-302-94/+19
* radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cppTom Stellard2012-07-3012-693/+512
* radeon/llvm: Merge AMDILRegisterInfo into AMDGPURegisterInfoTom Stellard2012-07-3012-283/+69
* radeon/llvm: Change the tablegen target from AMDIL to AMDGPUTom Stellard2012-07-3014-107/+119
* radeon/llvm: Add instruction defs for branches on SITom Stellard2012-07-273-17/+126
* radeon/llvm: Fix VOPC and V_CNDMASK encodingTom Stellard2012-07-274-10/+13
* radeon/llvm: Assert if we try to copy SCC regTom Stellard2012-07-271-0/+6
* radeon/llvm: Add SI DAG optimizations for setcc, select_ccTom Stellard2012-07-272-0/+54
* radeon/llvm: Add support for encoding SI branch instructionsTom Stellard2012-07-271-15/+35
* radeon/llvm: Add special nodes for SALU operations on VCCTom Stellard2012-07-276-1/+89
* radeon/llvm: Add i1 registers for SI.Tom Stellard2012-07-271-0/+2
* radeon/llvm: Fix CCReg definitions on SITom Stellard2012-07-272-3/+10
* radeon/llvm: Add bitconvert patterns for SITom Stellard2012-07-271-0/+6
* radeon/llvm: Add custom lowering for SELECT_CC nodes on SITom Stellard2012-07-272-0/+20
* radeon/llvm: Move conditional pattern leafs to common tablegen fileTom Stellard2012-07-272-41/+41
* radeon/llvm: Implement getSetCCResultType for SITom Stellard2012-07-272-0/+6