| Commit message (Collapse) | Author | Age | Files | Lines |
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Reviewed-by: Marek Olšák <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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Acked-by: Timothy Arceri <[email protected]>
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The get_size perf counter callback is also inlined and removed.
Acked-by: Timothy Arceri <[email protected]>
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Most files in gallium/radeon now include si_pipe.h.
chip_class and family are now here:
sscreen->info.family
sscreen->info.chip_class
Reviewed-by: Nicolai Hähnle <[email protected]>
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It's inaccurate. Instead, see the copyright and use "git log" and
"git blame" to know the authorship.
Acked-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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This marks the end of code sharing between r600 and radeonsi.
It's getting difficult to work on radeonsi without breaking r600.
A lot of functions had to be renamed to prevent linker conflicts.
There are also minor cleanups.
Acked-by: Dave Airlie <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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This reverts commit 7088b655e8828bb960f528dd33132de27c505b8f.
It breaks performance counters. If you use them with this commit, they hang
the machine hard. Sysrq and ssh don't work.
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This moves the structs from the data segment to the rodata segment,
which seems like the more correct place for them.
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Timothy Arceri <[email protected]>
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for threaded gallium
Reviewed-by: Timothy Arceri <[email protected]>
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so that the graphs are independent from FPS.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Regression introduced by "gallium/radeon: zero all query buffers".
Cc: Michel Dänzer <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Step one to merging radv would be to move some files around.
This only adds the include path to r600/radeonsi, because later
we want to avoid having to add it to the generic target paths.
Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Vedran Miletić <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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This is useful for shader-related counters, since they tend to quickly
exceed 32 bits.
Reviewed-by: Marek Olšák <[email protected]>
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not used anymore
Reviewed-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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This is yet another change motivated by appeasing AMD GPUPerfStudio's
hardcoding of performance counter group numbers.
Reviewed-by: Edward O'Callaghan <[email protected]>
Acked-by: Marek Olšák <[email protected]>
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This test is a left-over of the initial development. It is unneeded and
misleading, so let's get rid of it.
Reviewed-by: Edward O'Callaghan <[email protected]>
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Since the query names are not very enlightening, and there are thousands
of them, GALLIUM_HUD=help should only show the first and last query name
for each hardware block.
Reviewed-by: Marek Olšák <[email protected]>
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This shaves a bit more time off the startup of programs that don't
actually use performance counters.
Reviewed-by: Marek Olšák <[email protected]>
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Expose most of the performance counter groups that are exposed by Catalyst.
Ideally, the driver will work with GPUPerfStudio at some point, but we are not
quite there yet. In any case, this is the reason for grouping multiple
instances of hardware blocks in the way it is implemented.
The counters can also be shown using the Gallium HUD. If one is interested to
see how work is distributed across multiple shader engines, one can set the
environment variable RADEON_PC_SEPARATE_SE=1 to obtain finer-grained performance
counter groups.
Part of the implementation is in radeon because an implementation for
older hardware would largely follow along the same lines, but exposing
a different set of blocks which are programmed slightly differently.
Reviewed-by: Marek Olšák <[email protected]>
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