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path: root/src/gallium/drivers/radeon/R600InstrInfo.h
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* radeon/llvm: Remove backend code from MesaTom Stellard2013-01-041-132/+0
* radeon/llvm: Fix instruction encoding for r600 family GPUsTom Stellard2012-09-241-13/+0
* radeon/llvm: Fix some coding style issuesTom Stellard2012-08-231-9/+11
* radeon/llvm: Use the MCCodeEmitter for R600Tom Stellard2012-08-231-2/+0
* radeon/llvm: Remove the last uses of MachineOperand flagsTom Stellard2012-08-231-0/+6
* radeon/llvm: Add flag operand to some instructionsTom Stellard2012-08-231-0/+6
* radeon/llvm: Encapsulate setting of MachineOperand flagsTom Stellard2012-08-231-0/+3
* radeon/llvm: Add callbacks needed by if-cvtVincent Lejeune2012-08-151-0/+37
* radeon/llvm: Lower branch/branch_cond into predicated jumpVincent Lejeune2012-08-151-0/+9
* radeon/llvm: Support for predicate bitVincent Lejeune2012-08-151-0/+3
* radeon/llvm: Cleanup AMDGPUUtil.cppApostolos Bartziokas2012-08-151-0/+5
* radeon/llvm: Merge AMDILInstrInfo.cpp into AMDGPUInstrInfo.cppTom Stellard2012-07-301-1/+1
* radeon/llvm: Use the VLIW Scheduler for R600->NITom Stellard2012-06-211-0/+5
* radeon/llvm: Fix MULLO* instructions on CaymanTom Stellard2012-06-061-1/+6
* radeon/llvm: Remove obselete hooks for the ConvertToISA passTom Stellard2012-06-061-4/+0
* radeon/llvm: Add isMov() to AMDILInstrInfoTom Stellard2012-06-061-0/+1
* radeon/llvm: Eliminate CFGStructurizer dependency on AMDIL instructionsTom Stellard2012-06-011-1/+5
* radeon/llvm: Lower UDIV using the Selection DAGTom Stellard2012-05-241-3/+0
* radeon/llvm: Remove auto-generated AMDIL->ISA conversion codeTom Stellard2012-05-241-7/+0
* radeon/llvm: Add some commentsTom Stellard2012-05-101-2/+2
* radeon/llvm: add support for AHSR/LSHR/LSHL instructionsVadim Girlin2012-05-081-0/+1
* radeonsi: initial WIP SI codeTom Stellard2012-04-131-0/+74