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* r600g: remove r600.h, move the stuff elsewhere (mostly to r600_pipe.h)Marek Olšák2013-03-111-155/+0
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove deprecated state management codeMarek Olšák2013-03-111-79/+0
| | | | | | It's nice to see so much code that did pretty much nothing go away. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: always map uninitialized buffer range as unsynchronizedMarek Olšák2013-03-011-0/+11
| | | | | | | | | | Any driver can implement this simple and efficient optimization. Team Fortress 2 hits it always. The DISCARD_RANGE codepath is not even used with TF2 anymore, so we avoid a ton of useless buffer copies. Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: flush and invalidate htile cache when appropriateMarek Olšák2013-03-011-0/+1
| | | | | | Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: atomize streamout enablingMarek Olšák2013-03-011-2/+0
| | | | | | | | | | | | This doesn't fix any issue we know of, but there indeed is a week spot in draw_vbo where streamout can fail. After streamout is enabled, the need_cs_space call can flush the context, which causes the streamout to be disabled right after it was enabled and bad things happen. One way to fix it is to atomize the beginning part, so that no context flush can happen between streamout enabling and the first drawing. Tested-by: Andreas Boll <[email protected]>
* r600g: add PS_PARTIAL_FLUSH flagAlex Deucher2013-02-221-0/+1
| | | | | | | | | PS_PARTIAL flushes seems to be required in certain cases to prevent hangs, especially on r6xx. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]>
* r600g: use uint64_t instead of unsigned long for proper 32bits cpu supportJerome Glisse2013-01-281-6/+6
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add async for staging buffer upload v2Jerome Glisse2013-01-281-0/+27
| | | | | | v2: Add virtual address to dma src/dst offset for cayman Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix compile warnings in r600_cp_dma_copy_buffer on 32-bit gccMarek Olšák2013-01-261-2/+2
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* r600g: fix up CP DMA for VM on cayman and TNAlex Deucher2013-01-251-2/+2
| | | | | | | Need to add the virtual address. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* r600g: implement buffer copying using CP DMA for R7xx, Evergreen, CaymanMarek Olšák2013-01-081-3/+8
| | | | | | | | | | R6xx doesn't work - the issue seems to be with flushing (sometimes the destination buffer contains garbage). There are no hangs, so we're good. R7xx doesn't seem to have any alignment restriction despite our initial thinking. Everything just works. Reviewed-by: Alex Deucher <[email protected]>
* radeon/winsys: move radeon family/class identification to winsysJerome Glisse2013-01-071-37/+0
| | | | | | | | Upcoming async dma support rely on winsys knowing about GPU families. Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: rename GPU_FLUSH -> INVAL_READ_CACHESMarek Olšák2012-12-221-1/+1
| | | | because that's what it does.
* r600g: rework flusing and synchronization pattern v7Jerome Glisse2012-12-201-11/+5
| | | | | | | | | | | | | | | This bring r600g allmost inline with closed source driver when it comes to flushing and synchronization pattern. v2-v4: history lost somewhere in outer space v5: Fix compute size of flushing, use define for flags, update worst case cs size requirement for flush, treat rs780 and newer as r7xx when it comes to streamout. v6: Fix num dw computation for framebuffer state, remove dead code, use define instead of hardcoded value. v7: Remove dead code Signed-off-by: Jerome Glisse <[email protected]>
* r600g: suballocate memory for the STRMOUT_BUFFER_FILLED_SIZE registerMarek Olšák2012-12-121-1/+3
| | | | | | | | | | Instead of having a 4-byte buffer for each streamout target, we suballocate each dword from a 4K buffer. This further reduces the overall number of relocations. Tested-by: Aaron Watry <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: flush FMASK and CMASK when changing colorbuffers on EvergreenMarek Olšák2012-09-271-0/+1
| | | | | | This fixes rare graphical corruption. NOTE: This is a candidate for the stable branches.
* r600g: convert the remnants of VGT state into immediate register writes/atoms v4Marek Olšák2012-09-131-7/+0
| | | | | | | | | v2: Group vgt register together to avoid lockup v3: Split multi primitive register and index bias register v4: Bump R600_NUM_ATOMS Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Jerome Glisse <[email protected]>
* r600g: initialize the first CS just like any other CSMarek Olšák2012-09-131-0/+1
| | | | | | by reusing the CS initialization in r600_context_flush. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: simplify flushingMarek Olšák2012-09-131-7/+11
| | | | | | | | | | | | Based on the patch called "simplify and fix flushing and synchronization" by Jerome Glisse. Rebased, removed unneded code, simplified more and cleaned up. Also, SH_ACTION_ENA is not set when changing shaders (hw doesn't seem to need it). It's only used to flush constant buffers. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove unused functionMarek Olšák2012-09-111-5/+0
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* r600g: atomize sampler state v2Jerome Glisse2012-08-061-4/+1
| | | | | | | | | | | Use atom for sampler state. Does not provide new functionality or fix any bug. Just a step toward full atom base r600g. v2: Split seamless on r6xx/r7xx into it's own atom. Make sure it's emited after sampler and with a pipeline flush before otherwise it does not take effect. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: inline r600_context_draw_opaque_countMarek Olšák2012-07-181-1/+0
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* r600g: remove unused code after conversion of sampler viewsMarek Olšák2012-07-171-11/+0
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* r600g: Add r600_context_pipe_state_emit()Tom Stellard2012-07-091-0/+1
| | | | | | | | This function is used when dispatching compute shader in order to avoid mixing compute and 3D registers in the context's dirty list. This allows the compute code to resuse 3D functions like evergreen_cb, which return a struct r600_pipe_state and still have control over when and how the register writes are emitted.
* r600g: Add pkt_flag parameter to r600_context_block_emit_dirty()Tom Stellard2012-07-091-1/+1
| | | | | | | This allows the shader type bit to be set in the pm4 header when emitting registers for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* gallium: make user vertex buffers optionalMarek Olšák2012-04-241-1/+0
| | | | | | | | | | | This couldn't be split because it would break bisecting. Summary: * r300g,r600g: stop using u_vbuf * r300g,r600g: also report that the FIXED vertex type is unsupported * u_vbuf: refactor for use in the state tracker * cso: wire up u_vbuf with cso_context * st/mesa: conditionally install u_vbuf
* u_vbuf: remove u_vbuf_resourceMarek Olšák2012-04-241-1/+2
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* r600g: split add_reg into add_reg and add_reg_bo variantsDave Airlie2012-04-231-4/+10
| | | | | | | | | This shaves 2k off the final dri.so, and removes lots of pointless NULL, 0 passing. most like pointless - but it looked nicer to me. Signed-off-by: Dave Airlie <[email protected]>
* r600g: remove dead code after the reworkMarek Olšák2012-04-041-12/+0
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: rework state emission of vertex buffersMarek Olšák2012-04-041-1/+0
| | | | | | | | | | | | This reduces a little of CPU overhead. The idea is to translate pipe vertex buffers directly into the CS and not using any intermediate representations. Framerate in Torcs: before: 32.2 after: 34.6 Reviewed-by: Alex Deucher <[email protected]>
* r600g: cleanup after get_query_result changeMarek Olšák2012-03-301-6/+0
| | | | Finally, union r600_query_result can be removed.
* r600g: add support for TN (trinity) APUsAlex Deucher2012-03-201-0/+1
| | | | | | Note: this is a candidate for the stable branches. Signed-off-by: Alex Deucher <[email protected]>
* r600g: remove unused definitionsMarek Olšák2012-03-051-3/+0
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* r600g: move all query code into r600_query.cMarek Olšák2012-03-051-12/+0
| | | | | | | | And rename or inline functions where appropriate. There is no reason to keep this stuff in r600_hw_context.c. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: rework queriesMarek Olšák2012-02-231-14/+21
| | | | | | | | | | | | | | | | We always mapped the query buffer in begin_query, causing stalls if the buffer was busy. This commit reworks it such that the query buffer is only mapped in get_query_result as it's supposed to be. The query buffer is no longer treated as a ring buffer. Instead, the results are just appended and when the buffer is full, we create a new one. One query can have more than one query buffer, though that's a very rare case. Begin_query releases all query buffers. Reviewed-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: remove duplicated set_xx_resource functionsMarek Olšák2012-02-231-3/+0
| | | | | Reviewed-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: add a depth misc state which depends on occlusion queriesMarek Olšák2012-02-211-2/+0
| | | | | | | | | | | | | | | | This is a state which is derived from other states and is actually the first state which doesn't correspond to any gallium state. There are two state flags: bool occlusion_query_enabled bool flush_depthstencil_enabled Additional flags can be added later if needed, e.g. bool hiz_enabled. The emit function will have to figure out the register values by itself. It basically just emits the registers when the state changes. This commit also adds a few helper functions for writing registers directly into a command stream.
* r600g: consolidate the main draw codeMarek Olšák2012-02-211-13/+2
| | | | | The code was almost the same for r600 and eg. What can't be consolidated is in the *_prepare functions.
* r600g: fix computation of how many dwords is needed for a flush at the end of CSMarek Olšák2012-01-311-1/+0
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* r600g: remove more dead codeMarek Olšák2012-01-311-2/+0
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* r600g: rework cache flushingMarek Olšák2012-01-311-3/+4
| | | | | | | | | | | This also significantly improves the RV670 flush by using the CB1 flush *always* and also DEST_BASE_0_ENA, which appears to magically fix some tests. I am not entirely sure, but it's possible that RV670 flushing is fixed completely. v2: fix cayman by flushing texture cache instead of vertex cache Thanks to Dave Airlie for testing Cayman.
* r600g: consolidate some context_draw codeMarek Olšák2012-01-311-0/+3
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* r600g: don't initialize the screen and winsys pointer twiceMarek Olšák2012-01-311-2/+2
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* r600g: merge r600_context with r600_pipe_contextMarek Olšák2012-01-311-48/+4
| | | | The split made no sense.
* r600g: remove u8,u16,u32,u64 typesMarek Olšák2012-01-311-28/+23
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* r600g: don't use r600_context_reg on r6xx-r7xxMarek Olšák2012-01-311-0/+1
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: don't use r600_context_reg on evergreenMarek Olšák2012-01-311-0/+1
| | | | | | | Just getting rid of things which use the register mask. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: get rid of the mask in r600_pipe_regMarek Olšák2012-01-311-1/+0
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: get rid of the mask parameter in pipe_state_add_regMarek Olšák2012-01-311-3/+3
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* gallium: improve the pipe_stream_output_info struct (v2)Marek Olšák2012-01-151-2/+2
| | | | | | | | | | | | | | | | | | | | | There are 3 changes: 1) stride is specified for each buffer, not just one, so that drivers don't have to derive it from the outputs 2) new per-output property dst_offset, which specifies the offset into the buffer in dwords where the output should be stored, so that drivers don't have to compute the offsets manually; this will also be useful for gl_SkipComponents from ARB_transform_feedback3 3) register_mask is removed, instead, there is start_component and num_components; register_mask with non-consecutive 1s doesn't make much sense (some hardware cannot do packing of components) Christoph Bumiller: fixed nvc0. v2: resolve merge conflicts in Draw and clean it up
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