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* nv50,nvc0: flush texture cache in presence of coherent bufsIlia Mirkin2015-09-171-0/+20
| | | | | | | | This fixes the newly-added arb_texture_buffer_object-bufferstorage piglit test. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nv50,nvc0: detect underlying resource changes and update ticIlia Mirkin2015-09-171-0/+22
| | | | | | | | | | | | | When updating texture buffers, we might end up replacing the whole buffer. Check that the tic address matches the resource address, and if not, update the tic and reupload it. This fixes: arb_direct_state_access-texture-buffer arb_texture_buffer_object-data-sync Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nv50, nvc0: fix max texture buffer size to 128M elementsIlia Mirkin2015-09-161-1/+1
| | | | | | | | This is what the hardware supports, there never was any sort of 64K limit. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.6 11.0" <[email protected]>
* nv50/ir: add support for TXQS tgsi opcodeIlia Mirkin2015-09-131-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add PIPE_CAP_TGSI_TXQS to let st know if TXQS is supportedIlia Mirkin2015-09-131-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Glenn Kennard <[email protected]>
* nvc0: keep track of cb bindings per buffer, use for upload settingsIlia Mirkin2015-09-094-8/+51
| | | | | | | | | | | | | | | | | | | CB updates to bound buffers need to go through the CB_DATA endpoints, otherwise the shader may not notice that the updates happened. Furthermore, these updates have to go in to the same address as the bound buffer, otherwise, again, the shader may not notice updates. So we keep track of all the places where a constbuf is bound, and iterate over all of them when updating data. If a binding is found that encompasses the region to be updated, then we use the settings of that binding for the upload. Otherwise we upload as a regular data update. This fixes piglit 'arb_uniform_buffer_object-rendering offset' as well as blurriness in Witcher2. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91890 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nvc0: always emit a full shader colormaskIlia Mirkin2015-09-081-1/+1
| | | | | | | | | | | | | | Indications are that if the colormask indicates a single bit set on fermi, that value will always be read from $r0 instead of a potentially higher register (if e.g. green is set). Not to upset the counting logic, always set the header up with a full color mask for each RT. Such a situation can basically only ever happen with generated blit shaders. Fixes the following piglit on Fermi (Kepler is unaffected): fbo-stencil blit GL_DEPTH32F_STENCIL8 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.6 11.0" <[email protected]>
* nvc0: change prefix of MP performance counters to HW_SMSamuel Pitoiset2015-08-292-149/+149
| | | | | | | According to NVIDIA, local performance counters (MP) are prefixed with SM, while global performance counters (PCOUNTER) are called PM. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: sort performance counter queries by nameSamuel Pitoiset2015-08-292-142/+142
| | | | Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: make names of performance counter queries consistentSamuel Pitoiset2015-08-292-56/+56
| | | | Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: use enumerations for driver queriesSamuel Pitoiset2015-08-291-120/+123
| | | | Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: remove commented out code related to PCOUNTER queriesSamuel Pitoiset2015-08-291-20/+0
| | | | Signed-off-by: Samuel Pitoiset <[email protected]>
* nouveau: avoid build failures since 0fc21ecfIlia Mirkin2015-08-261-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add flags parameter to pipe_screen::context_createMarek Olšák2015-08-262-2/+2
| | | | | | | | This allows creating compute-only and debug contexts. Reviewed-by: Brian Paul <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]>
* nv50,nvc0: disable depth bounds test on blitIlia Mirkin2015-08-231-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nvc0: implement the color buffer 0 is integer rule for alpha-to-one/covIlia Mirkin2015-08-173-11/+22
| | | | | | | | | | | | The hardware checks for multisampling being enabled, but does not have the rule about cbuf0 being an integer format. Only enable alpha-to-one/alpha-to-coverage if cbuf0 is not an integer format. Fixes piglits ext_framebuffer_multisample-int-draw-buffers-alpha-to-one ext_framebuffer_multisample-int-draw-buffers-alpha-to-coverage Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: program smooth line width when multisampling is enabledIlia Mirkin2015-08-171-1/+1
| | | | | | | | | | There are separate line widths for smooth and aliased lines. The smooth one is selected when multisampling is enabled even if line smoothing isn't explicitly turned on. Fixes the ext_framebuffer_multisample-line-smooth piglits Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: bind a fake tess control program when there isn't one availableIlia Mirkin2015-08-174-8/+44
| | | | | | | | | | | Apparently this is necessary in order for tess factors to work in a tess eval program without a tess control program bound. Probably because it uses the fake program's shader header to work out the number of patch constants. Fixes vs-tes-tessinner-tessouter-inputs Signed-off-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: take level into account when doing eng2d multi-layer blitsIlia Mirkin2015-08-171-4/+10
| | | | | | | | This fixes arb_get_texture_sub_image-get, and any situation where the 2d engine was being used for multi-layer blits to a non-0 level. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.6" <[email protected]>
* nvc0: disable tessellation on maxwellIlia Mirkin2015-08-141-2/+5
| | | | | | | | The address calculations are all different (e.g. see GP), there appear to be sync's in programs, and probably a bunch of other differences. Just disable it for now. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add depth bounds test supportIlia Mirkin2015-08-143-2/+9
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add an interface for EXT_depth_bounds_testMarek Olšák2015-08-141-0/+1
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: add support for GLES texture float extensions (v3)Marek Olšák2015-08-141-0/+2
| | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329 v2: add a CAP for half floats drivers should not expose the CAPs if they don't support the formats v3: update relnotes Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* nvc0: fix geometry program revalidation of clipping paramsIlia Mirkin2015-07-251-1/+1
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected]
* nvc0/ir: per-patch vars are in a separate address spaceIlia Mirkin2015-07-241-11/+7
| | | | | | | | | | | | | There's no need to attempt to avoid overlapping generic i/o with patch i/o. By the same token, we can't merge patch and non-patch loads/stores. This fixes at least the tes-both-input-array-*-index-rd tessellation variable-indexing tests. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: cleanup private enums that have graduated to galliumIlia Mirkin2015-07-231-2/+0
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: mark varyings as per-patch based on semantic nameIlia Mirkin2015-07-231-4/+2
| | | | | | Also add proper handling for PATCH semantics Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: TESSCOORD comes in as a sysval, not an inputIlia Mirkin2015-07-231-9/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add handling for set_tess_state callbackIlia Mirkin2015-07-233-0/+34
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: add support for setting patch vertices at draw timeIlia Mirkin2015-07-234-3/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: support MAX_SHADER_PATCH_VARYINGSIlia Mirkin2015-07-231-1/+2
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* nvc0: preliminary tess supportIlia Mirkin2015-07-237-47/+82
| | | | | | | Uncomment the various functionality that was already there and add in obvious missing bits that parallel vp/gp/fp functionality. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: replace INLINE with inlineIlia Mirkin2015-07-2117-72/+72
| | | | | | | | | | | | | | | | Generated by running: git grep -l INLINE src/gallium/ | xargs sed -i 's/\bINLINE\b/inline/g' git grep -l INLINE src/mesa/state_tracker/ | xargs sed -i 's/\bINLINE\b/inline/g' git checkout src/gallium/state_trackers/clover/Doxyfile and manual edits to src/gallium/include/pipe/p_compiler.h src/gallium/README.portability to remove mentions of the inline define. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Marek Olšák <[email protected]>
* nvc0: force cache flush when binding a new uboSamuel Pitoiset2015-07-211-0/+2
| | | | | | | | This fixes the following piglit test: ext_transform_feedback-immediate-reuse-uniform-buffer Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: use bool instead of booleanSamuel Pitoiset2015-07-2120-226/+226
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: add a missing parameter to nvc0_set_shader_images()Samuel Pitoiset2015-07-201-3/+3
| | | | | | | | | | | This fixes a compilation warning introduced in commit 05a12c5 (gallium: add interface for writable shader images). While we are at it, fix indentation and rename parameters according to the gallium interface. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: add interface for writable shader imagesMarek Olšák2015-07-161-4/+6
| | | | | | PIPE_CAPs will be added some other time. Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: add PIPE_CAP_MAX_SHADER_PATCH_VARYINGSMarek Olšák2015-07-161-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50, nvc0: enable at least one color RT if alphatest is enabledIlia Mirkin2015-07-101-0/+18
| | | | | | | | | Fixes the following piglits: fbo-alphatest-nocolor fbo-alphatest-nocolor-ff Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copySamuel Pitoiset2015-07-081-1/+1
| | | | | | | | | | According to nv50, this should be src->ms_y instead of src->ms_x. This code is here since 2012, so it's probably a typo error which has never been detected since a long time. I didn't do a full piglit run to check if it fixes some other weird issues. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: turn sample counts off during blitIlia Mirkin2015-07-071-0/+7
| | | | | | | | | Fixes the following piglits: occlusion_query_meta_fragments occlusion_query_meta_no_fragments Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
| | | | | | | | | | Prefer blit-based texture transfers only if the chip has dedicated VRAM since it would translate to a copy into the same memory on shared-memory chips. Signed-off-by: Alexandre Courbot <[email protected]> Reported-by: Ilia Mirkin <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
| | | | | | | | | | | | | | | This is required on non-coherent architectures to ensure the value of the fence is correct at all times. Failure to do this results in the display freezing for a few seconds every now and then on Tegra. The NOUVEAU_BO_COHERENT is a no-op for coherent architectures, so behavior on x86 should not be affected by this patch. Also bump the required libdrm version to 2.4.62, which introduced this flag. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Martin Peres <[email protected]>
* gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZEGrigori Goronzy2015-06-291-0/+4
| | | | | | | We need this to implement OpenCL's CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE. Reviewed-by: Francisco Jerez <[email protected]>
* nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_dataIlia Mirkin2015-06-232-0/+2
| | | | | | | | | | | | Without first running the bo through pushbuf_refn, the nouveau drm library will have uninitialized structures regarding this bo, and will insert incorrect data. This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot of indirect draws). Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0: always put all tfb bufs into bufctxIlia Mirkin2015-06-231-3/+4
| | | | | | | | | | Since we clear the TFB bufctx binding point above, we need to put all of the active tfb's back in, even if they haven't changed since last time. Otherwise the tfb may get moved into sysmem and the underlying mapping will generate write errors. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* nvc0: use NV_VRAM_DOMAIN() macroAlexandre Courbot2015-06-229-18/+23
| | | | | | | | | Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative VRAM domains for chips that do not have dedicated video memory. Signed-off-by: Alexandre Courbot <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Martin Peres <[email protected]>
* nv50,nvc0: clamp uniform size to 64kIlia Mirkin2015-06-151-2/+2
| | | | | | | | | | The state tracker will pass through requests from buggy applications which will have the buffer size larger than the max allowed (64k). Clamp the size to 64k so that we don't get errors when uploading the constbuf data. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* tgsi/ureg: don't emit in/out arrays if drivers don't support ranged declarationsMarek Olšák2015-06-051-0/+1
| | | | | | Softpipe, llvmpipe, r300g, and radeonsi pass tests. Other drivers need testing. Freedreno and nv30 are definitely broken. Other drivers seem to be alright.
* nvc0: a geometry shader can have up to 1024 vertices outputIlia Mirkin2015-05-231-1/+1
| | | | | | | | The 1024 is already reported everywhere, not sure where this 0x1ff came from. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
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