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path: root/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
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* gm107/ir: change how SUQ works in preparation for bindlessIlia Mirkin2018-02-171-0/+1
* gm107/ir: optimize 32-bit CONST load to movSamuel Pitoiset2016-11-261-0/+1
* gm107/ir: add a legalize SSA pass for PFETCHSamuel Pitoiset2016-07-271-0/+8
* nvc0: add maxwell (sm50) compiler backendBen Skeggs2014-05-151-0/+18