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path: root/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
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* nvc0/ir: use the combined tid special registerRhys Perry2018-07-071-0/+1
* nvc0/ir: all short immediates are sign-extended, adjust LIMM testIlia Mirkin2018-04-241-4/+8
* nvc0/ir: fix emiting NOTs with predicatesKarol Herbst2018-03-291-0/+2
* nv50/ir: fix ConstantFolding with saturationKarol Herbst2017-08-091-0/+1
* nvc0/ir: Add SV_LANEMASK_* system values.Boyan Ding2017-04-131-0/+5
* nvc0/ir: Allow 0/1 immediate value as source of OP_VOTEBoyan Ding2017-04-131-4/+20
* nvc0/ir: Emit OP_SHFLBoyan Ding2017-04-131-0/+53
* nvc0/ir: Properly handle a "split form" of predicate destinationBoyan Ding2017-04-131-2/+13
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-091-6/+8
* nvc0/ir: fix SET and SLCT emissionIlia Mirkin2017-02-091-0/+2
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-091-1/+6
* nvc0/ir: emit FMZ flag when requested on FFMAIlia Mirkin2017-01-151-0/+4
* nvc0/ir: fix emission of IMAD with NEG modifiersSamuel Pitoiset2016-10-271-1/+1
* nvc0/ir: fix emission of SHLADD with NEG modifiersSamuel Pitoiset2016-10-261-1/+1
* nvc0/ir: remove outdated comment about SHLADDSamuel Pitoiset2016-10-221-1/+0
* nvc0/ir: add emission for SHLADDSamuel Pitoiset2016-09-291-0/+43
* nvc0/ir: fix subops for IMADSamuel Pitoiset2016-09-171-4/+6
* nv50/ir: always emit the NDV bit for OP_QUADOPSamuel Pitoiset2016-08-301-4/+1
* nvc0/ir: fix up an assertion in emitUADD()Samuel Pitoiset2016-07-241-4/+3
* nvc0: add support for VOTE tgsi opcodesIlia Mirkin2016-06-061-4/+19
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
* nvc0/ir: fix emission of predicate spill to registerIlia Mirkin2016-05-301-1/+2
* nvc0/ir: handle a load's reg result not being used for locked variantsIlia Mirkin2016-05-261-6/+20
* nvc0/ir: add emission for SULDB and SUSTxSamuel Pitoiset2016-05-211-2/+44
* nvc0/ir: add emission for OP_SULEASamuel Pitoiset2016-05-211-0/+58
* nvc0: fix gl_SampleMaskIn computationIlia Mirkin2016-05-111-0/+14
* nv50/ir: generalize interp fixups to be able to fixup anythingIlia Mirkin2016-05-111-4/+3
* nvc0/ir: fix wrong emission of (a OP b) OP cSamuel Pitoiset2016-04-261-2/+2
* nvc0/ir: fix wrong pred emission for ld lock on GK104Samuel Pitoiset2016-04-011-1/+4
* nvc0/ir: make sure that thread count immediate for BAR fitSamuel Pitoiset2016-03-071-0/+1
* nv50/ir: emit VOTE instructionSamuel Pitoiset2016-02-281-0/+23
* nvc0/ir: add missing emission of locked load predicateSamuel Pitoiset2016-02-221-0/+7
* nvc0/ir: add ld lock/st unlock emission on GK104Samuel Pitoiset2016-02-221-10/+25
* nv50/ir: restore OP_SELP to be a regular instructionSamuel Pitoiset2016-02-221-4/+4
* nv50/ir: make OP_SELP a compare instructionSamuel Pitoiset2016-02-211-4/+9
* nv50/ir: add lock/unlock subops for load/storeSamuel Pitoiset2016-02-211-2/+14
* nv50/ir: fix quadop emission in the presence of predicationIlia Mirkin2016-02-161-1/+1
* nvc0/ir: fix converting between predicate and gprIlia Mirkin2016-02-051-1/+7
* nvc0/ir: fix atomic compare-and-swap argumentsIlia Mirkin2016-01-291-2/+4
* nvc0/ir: add support for PK2H/UP2HIlia Mirkin2016-01-031-1/+4
* nv50/ir: always display the opcode number for unknown instructionsSamuel Pitoiset2015-11-291-1/+1
* nvc0/ir: actually emit AFETCH on keplerIlia Mirkin2015-11-181-0/+3
* nvc0/ir: add support for TGSI_SEMANTIC_HELPER_INVOCATIONIlia Mirkin2015-11-121-0/+1
* nvc0/ir: Add support for double immediatesHans de Goede2015-11-061-0/+8
* nvc0: do upload-time fixups for interpolation parametersIlia Mirkin2015-10-291-2/+28
* nvc0/ir: detect i2f/i2i which operate on specific bytes/wordsIlia Mirkin2015-08-201-0/+4
* gk110/ir: fix sched calculator to consider all registers in the ISAIlia Mirkin2015-08-171-7/+10
* nvc0/ir: fix barrier emissionIlia Mirkin2015-07-281-0/+2
* nvc0/ir: kepler can't do indirect shader input/output loads directlyIlia Mirkin2015-07-231-0/+16
* nvc0/ir: allow iset to produce a boolean floatIlia Mirkin2015-05-221-1/+7
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