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path: root/src/gallium/drivers/nouveau/codegen/nv50_ir.h
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* nvc0/ir: use the combined tid special registerRhys Perry2018-07-071-0/+1
* nvc0: add support for bindless textures on kepler+Ilia Mirkin2018-01-071-0/+1
* nv50/ir: add precise field to InstructionKarol Herbst2017-07-211-0/+2
* nv50/ir: Remove unused translation methodsPierre Moreau2017-05-071-1/+0
* nvc0/ir: Add SV_LANEMASK_* system values.Boyan Ding2017-04-131-0/+5
* nv50/ir: remove unused swizzle field in ValueRefIlia Mirkin2017-04-091-1/+0
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-091-1/+1
* nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bitIlia Mirkin2017-02-091-0/+1
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-091-0/+4
* nv50/ir: add preliminary support for SHLADDSamuel Pitoiset2016-09-291-0/+1
* nvc0/ir: don't dual-issue ops that depend or interfere with each otherKarol Herbst2016-09-031-0/+4
* nvc0: add support for BGRA8 imagesIlia Mirkin2016-07-181-0/+3
* nouveau: Add support for SV_WORK_DIMHans de Goede2016-07-021-0/+1
* nv50/ir: add support for SULDP -> SULDB conversionIlia Mirkin2016-04-261-0/+71
* nv50/ir: add OP_BUFQ for buffers querySamuel Pitoiset2016-04-261-0/+1
* nouveau: codegen: Use FILE_MEMORY_BUFFER for buffersHans de Goede2016-04-201-0/+1
* nv50/ir: emit VOTE instructionSamuel Pitoiset2016-02-281-0/+4
* nv50/ir: add lock/unlock subops for load/storeSamuel Pitoiset2016-02-211-0/+2
* nv50/ir: add SUQ op by reading the info from driver constbufIlia Mirkin2016-01-291-0/+1
* nvc0: add ARB_shader_draw_parameters supportIlia Mirkin2015-12-301-0/+3
* nvc0/ir: add support for TGSI_SEMANTIC_HELPER_INVOCATIONIlia Mirkin2015-11-121-0/+1
* nv50/ir: add support for TXQS tgsi opcodeIlia Mirkin2015-09-131-2/+2
* nv50/ir: support different unordered_set implementationsChih-Wei Huang2015-08-201-4/+4
* nvc0/ir: kepler can't do indirect shader input/output loads directlyIlia Mirkin2015-07-231-0/+1
* nvc0/ir: tess factors are now sysvals, adapt codegen to expect thatIlia Mirkin2015-07-231-1/+2
* nvc0/ir: fix lowering of RSQ/RCP/SQRT/MOD to work with F64Ilia Mirkin2015-02-201-0/+1
* nv50/ir: use unordered_set instead of list to keep track of var usesTobias Klausmann2014-07-081-3/+4
* nvc0: add maxwell (sm50) compiler backendBen Skeggs2014-05-151-0/+6
* nvc0: bump sched data member to 32-bitsBen Skeggs2014-05-151-1/+1
* nv50/ir: change texture offsets to ValueRefs, allow nonconstIlia Mirkin2014-04-281-1/+2
* nvc0/ir: add support for new bitfield manipulation opcodesIlia Mirkin2014-04-281-0/+2
* nvc0/ir: add support for SAMPLEMASK sysvalIlia Mirkin2014-04-261-0/+1
* nvc0: add support for PIPE_CAP_SAMPLE_SHADINGIlia Mirkin2014-04-261-0/+7
* nv50: add support for PIPE_CAP_SAMPLE_SHADINGIlia Mirkin2014-04-261-0/+1
* nv50: enable texture query lodIlia Mirkin2014-04-071-0/+1
* nv50: add support for texelFetch'ing MS textures, ARB_texture_multisampleIlia Mirkin2014-01-271-0/+8
* nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPsChristoph Bumiller2014-01-271-0/+1
* Move nv30, nv50 and nvc0 to nouveau.Johannes Obermayr2013-09-111-0/+1197
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