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* iris: remove iris_monitor_configMarcin Ślusarz2020-07-061-2/+1
| | | | | | | | | | | | | | | | | | | perf_cfg is enough - it already contains almost all necessary information and is constructed in a more optimal way (O(n) vs O(n^2) - it uses hash table to build the unique counter list). "Almost all", because it doesn't contain OA raw counters, but we should have not exposed them anyway. Quoting Mark Janes: "I see no reason to include the OA raw counters in the list that are provided to the user. They are unusable. The MDAPI library can be used to configure raw counters in a way that provides esoteric metrics, but that library is written against INTEL_performance_query." Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
* iris: fix export of GEM handlesLionel Landwerlin2020-06-041-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We reuse DRM file descriptors internally. Therefore when we export a GEM handle we must do so in the file descriptor used externally. This change also fixes a file descriptor leak of the FD given at screen creation. v2: Don't bother checking fd equals, they're always different Fix dmabuf leak Fix GEM handle leaks by tracking exported handles v3: Check os_same_file_description error (Michel) Don't create multiple exports for a given GEM table v4: Add WARN_ONCE (Ken) Rename external_fd to winsys_fd v5: Remove export lock in favor of bufmgr's Signed-off-by: Lionel Landwerlin <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2882 Fixes: 7557f1605968 ("iris: share buffer managers accross screens") Tested-by: Eric Engestrom <[email protected]> Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861>
* iris: Drop redundant iris_address::write flag.Francisco Jerez2020-06-031-2/+1
| | | | | | | | | | The write flag is redundant since it can be inferred easily from the iris_address::access domain. This allows the iris_address struct to be laid out more efficiently in memory, leading to a measurable improvement in several Piglit Drawoverhead test-cases. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
* iris: Annotate all BO uses with domain and sequence number information.Francisco Jerez2020-06-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probably the most annoying patch to review from the whole series -- Mark every buffer object use as accessed through some caching domain with the sequence number of the current synchronization section of the batch. The additional argument of iris_use_pinned_bo() makes sure I'd have gotten a compile error if I had missed any buffer added to the batch validation list. There are only a few exceptions where a buffer is left untracked while adding it to the validation list, justified below: - Batch buffers: These are strictly read-only for the moment. - BLORP buffer objects: Their seqnos are bumped manually at the end of iris_blorp_exec() instead, in order to avoid plumbing domain information through BLORP address combining. - Scratch buffers: The contents of these are strictly thread-local. - Shader images and SSBOs: Accesses of these buffers are explicitly synchronized at the API level. v2: Opt out of tracking more aggressively (Ken): In addition to the above, surface states, binding tables, instructions and most dynamic states are now left untracked, which means a *lot* more BO uses marked IRIS_DOMAIN_NONE which need to be reviewed extremely carefully, since the cache tracker won't be able to provide any coherency guarantees for them. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
* iris: Add infrastructure to partition batch into sync boundaries.Francisco Jerez2020-06-031-0/+9
| | | | | | | | | | | | This introduces some minimalistic infrastructure which will be used in order to partition the batch into a series of sections, each one with a unique, monotonically-increasing sequence number. Section boundaries will typically lie at points in the batch where the execution and memory coherency status of some previous commands are known, e.g. at batch buffer boundaries or PIPE_CONTROL commands. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
* iris, i965: Update limits for ARB_compute_variable_group_sizeCaio Marcelo de Oliveira Filho2020-05-271-2/+0
| | | | | | | | | The CS compiler now produces multiple SIMD variants, so the previous trade-off between "always using SIMD32" and "having a smaller max invocations" is now gone. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
* iris: add identifier BOLionel Landwerlin2020-05-201-2/+6
| | | | | | | | | | A buffer added to all execbufs so that we can attribute a batch that caused a hang to a particular driver. v2: Reuse workaround BO Signed-off-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
* iris: store workaround addressLionel Landwerlin2020-05-201-0/+7
| | | | | | | | This will allow to select a different address later, leaving the beginning of the buffer to some other use. Signed-off-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
* gallium: rename 'state tracker' to 'frontend'Marek Olšák2020-05-131-1/+1
| | | | | | | Acked-by: Eric Anholt <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]> Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
* iris: Implement ARB_compute_variable_group_sizeCaio Marcelo de Oliveira Filho2020-05-011-0/+2
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
* iris: Detect DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT kernel supportKenneth Graunke2020-05-011-0/+4
| | | | | | We will use this for implementing deferred flushes in the next commit. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
* iris: move iris_vtable to iris_screenMike Blumenkrantz2020-04-291-2/+97
| | | | | | | | | instead of inlining this into every context, now a struct is used in the screen struct to reduce memory usage and simplify a couple of the methods Closes: https://gitlab.freedesktop.org/kwg/mesa/-/issues/6 Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4376>
* iris: make resources take a ref on the screen objectLionel Landwerlin2020-04-111-0/+22
| | | | | | | | | | | | | Because St creates resources from a screen and attach them onto another we need to ensure the resources associated to a screen & bufmgr stay around until we don't need them anymore. Signed-off-by: Lionel Landwerlin <[email protected]> Cc: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373 Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
* iris: share buffer managers accross screensLionel Landwerlin2020-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | St happilly uses pipe_resources created with one screen with other screens. Unfortunately our resources have a single identifier that related to a given screen and its associated DRM file descriptor. To workaround this, let's share the buffer manager between screens for a given DRM device. That way handles are always valid. v2: Don't forget to close the fd that bufmgr now owns Take a copy of the fd to ensure it stays alive even if the dri layer closes it Signed-off-by: Lionel Landwerlin <[email protected]> Cc: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373 Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
* iris: Store the L3$ configs in the screenJason Ekstrand2020-01-301-0/+4
| | | | | | | | | | | We only calculate them based on device info and never change them so this seems like a reasonable place to put them. We could also put them in the context, but that's not accessible from iris_init_*_context. Cc: "20.0" [email protected] Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
* iris: Add support for the always_flush_cache=true debug option.Kenneth Graunke2019-09-091-0/+1
| | | | This can be useful for debugging missing flushes.
* iris: Support the disable_throttling=true driconf option.Kenneth Graunke2019-09-061-0/+1
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* iris/perf: implement routines to return counter infoMark Janes2019-08-091-0/+2
| | | | | | | With this commit, Iris will report that AMD_performance_monitor is supported, and will allow the caller to query the available metrics. Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: switch boolean -> bool at the interface definitionsIlia Mirkin2019-07-221-1/+1
| | | | | | | | | | | | | | | | | | This is a relatively minimal change to adjust all the gallium interfaces to use bool instead of boolean. I tried to avoid making unrelated changes inside of drivers to flip boolean -> bool to reduce the risk of regressions (the compiler will much more easily allow "dirty" values inside a char-based boolean than a C99 _Bool). This has been build-tested on amd64 with: Gallium drivers: nouveau r300 r600 radeonsi freedreno swrast etnaviv v3d vc4 i915 svga virgl swr panfrost iris lima kmsro Gallium st: mesa xa xvmc xvmc vdpau va Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* iris: Start wiring up on-disk shader cacheDylan Baker2019-05-211-0/+5
| | | | | | | | This creates the on-disk shader cache data structure, and handles the build-id keying aspects. The next commits will fill it out so it's actually used. Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Report the same video memory settings as i965.Kenneth Graunke2019-05-081-0/+2
| | | | This just copy and pastes Ian's code from i965.
* iris: Enable the dual_color_blend_by_location driconf option.Kenneth Graunke2019-04-221-0/+6
| | | | This fixes rendering in Unigine Valley 1.0 and Heaven 4.0.
* iris: Add mechanism for iris-specific driconf optionsKenneth Graunke2019-04-221-1/+2
| | | | | | Based on Nicolai's 0f8c5de8690e7c87aa2e24383065efaca7e6fe78. Reviewed-by: Dylan Baker <[email protected]>
* iris: support INTEL_NO_HW environment variableMike Blumenkrantz2019-04-101-0/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Use copy_region and staging resources to avoid transfer stallsKenneth Graunke2019-03-081-0/+1
| | | | | | | | | | | | This is similar to intel_miptree_map_blit and intel_buffer_object.c's temporary blits in i965. Improves performance of DiRT Rally by 20-25% by eliminating stalls. Breaks piglit's spec/arb_shader_image_load_store/host-mem-barrier, by using the GPU to do uploads, exposing a st/mesa issue where it doesn't give us memory_barrier() calls. This is a pre-existing issue and will be fixed by a later patch (currently out for review).
* iris: Use READ_ONCE and WRITE_ONCE for snapshots_landedKenneth Graunke2019-02-211-0/+3
| | | | | | Suggested by Chris Wilson, if only to make it obvious to the human readers that these are volatile reads. It may also be necessary for the compiler in a few cases.
* iris: Enable precompilesKenneth Graunke2019-02-211-0/+3
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* iris: little bits of compute basicsKenneth Graunke2019-02-211-0/+2
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* iris: comment everythingKenneth Graunke2019-02-211-1/+11
| | | | | | 1. Write the code 2. Add comments 3. PROFIT (or just avoid cost of explaining or relearning things...)
* iris: slab allocate transfersKenneth Graunke2019-02-211-0/+3
| | | | apparently we need this for u_threaded_context
* iris: crazy pipe control codeKenneth Graunke2019-02-211-0/+1
| | | | imported from ~kwg/mesa pcx-2, gen < 8 code dropped
* iris: Soft-pin the universeKenneth Graunke2019-02-211-2/+0
| | | | Breaks everything, woo!
* iris: actually softpin at an addressKenneth Graunke2019-02-211-0/+2
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* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-211-0/+62
This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-06 06:17:27 +0000