| Commit message (Expand) | Author | Age | Files | Lines |
* | gallium: add BIND flags for R/W buffers and images | Marek Olšák | 2015-07-16 | 1 | -1/+1 |
* | ilo: add image_set_gen6_bo_size() | Chia-I Wu | 2015-07-01 | 1 | -0/+8 |
* | ilo: replace pipe_format by gen_surface_format | Chia-I Wu | 2015-06-26 | 1 | -10/+39 |
* | ilo: always use the specified image format | Chia-I Wu | 2015-06-26 | 1 | -11/+89 |
* | ilo: replace pipe_texture_target by gen_surface_type | Chia-I Wu | 2015-06-26 | 1 | -1/+23 |
* | ilo: initialize ilo_image from ilo_image_info | Chia-I Wu | 2015-06-26 | 1 | -22/+75 |
* | ilo: remove ilo_image_disable_aux() | Chia-I Wu | 2015-06-26 | 1 | -6/+2 |
* | ilo: remove ilo_buffer | Chia-I Wu | 2015-06-26 | 1 | -6/+16 |
* | ilo: introduce ilo_vma | Chia-I Wu | 2015-06-26 | 1 | -15/+22 |
* | ilo: align vertex buffer size in buf_create() | Chia-I Wu | 2015-06-22 | 1 | -2/+20 |
* | ilo: add ilo_image_disable_aux() | Chia-I Wu | 2015-06-14 | 1 | -7/+5 |
* | ilo: avoid resource owning in core | Chia-I Wu | 2015-06-14 | 1 | -10/+10 |
* | ilo: add ilo_image_can_enable_aux() | Chia-I Wu | 2015-05-02 | 1 | -10/+10 |
* | ilo: add ilo_image_init_for_imported() | Chia-I Wu | 2015-05-02 | 1 | -43/+44 |
* | ilo: improve readability of ilo_image | Chia-I Wu | 2015-05-02 | 1 | -5/+5 |
* | ilo: add ilo_buffer.h to core | Chia-I Wu | 2015-05-02 | 1 | -59/+29 |
* | ilo: move BOs from ilo_texture to ilo_image | Chia-I Wu | 2015-05-02 | 1 | -23/+25 |
* | ilo: move ilo_layout.[ch] to core as ilo_image.[ch] | Chia-I Wu | 2015-05-02 | 1 | -32/+31 |
* | ilo: add ilo_format.[ch] to core | Chia-I Wu | 2015-05-02 | 1 | -1/+1 |
* | ilo: move intel_winsys to ilo_dev_info | Chia-I Wu | 2015-05-02 | 1 | -6/+6 |
* | ilo: clarify valid and preferred tilings | Chia-I Wu | 2015-03-07 | 1 | -0/+3 |
* | ilo: add more convenient intel_bo_{ref,unref}() | Chia-I Wu | 2015-03-06 | 1 | -10/+7 |
* | ilo: add intel_bo_set_tiling() | Chia-I Wu | 2015-03-06 | 1 | -13/+20 |
* | ilo: replace intel_tiling_mode by gen_surface_tiling | Chia-I Wu | 2015-03-06 | 1 | -11/+55 |
* | ilo: use an accessor for dev->gen | Chia-I Wu | 2014-09-12 | 1 | -2/+3 |
* | ilo: replace domains by reloc flags | Chia-I Wu | 2014-08-26 | 1 | -12/+9 |
* | ilo: migrate to ilo_layout | Chia-I Wu | 2014-08-19 | 1 | -1288/+93 |
* | ilo: try unblocking a transfer with a staging bo | Chia-I Wu | 2014-07-28 | 1 | -4/+54 |
* | ilo: enable persistent and coherent transfers | Chia-I Wu | 2014-07-28 | 1 | -2/+15 |
* | ilo: check the tilings of imported handles | Chia-I Wu | 2014-07-24 | 1 | -30/+36 |
* | ilo: clean up resource bo renaming | Chia-I Wu | 2014-07-24 | 1 | -45/+57 |
* | ilo: share some code between {tex,buf}_create_bo | Chia-I Wu | 2014-07-24 | 1 | -59/+55 |
* | ilo: use native 3-component vertex formats on GEN7.5+ | Chia-I Wu | 2014-07-24 | 1 | -1/+3 |
* | ilo: raise texture size limits | Chia-I Wu | 2014-07-15 | 1 | -3/+6 |
* | ilo: move away from drm_intel_bo_alloc_tiled | Chia-I Wu | 2014-07-15 | 1 | -236/+293 |
* | ilo: replace bo alloc flags by initial domains | Chia-I Wu | 2014-03-10 | 1 | -8/+11 |
* | ilo: remove intel_bo_get_size() | Chia-I Wu | 2014-03-10 | 1 | -0/+17 |
* | ilo: pipe_texture::usage is not a bitfield | Chia-I Wu | 2014-02-22 | 1 | -1/+1 |
* | ilo: set ILO_TEXTURE_CPU_WRITE for imported textures | Chia-I Wu | 2014-02-22 | 1 | -3/+10 |
* | ilo: disable HiZ for misaligned levels | Chia-I Wu | 2014-01-14 | 1 | -5/+80 |
* | ilo: decide on hiz first in texture allocation | Chia-I Wu | 2014-01-14 | 1 | -64/+64 |
* | ilo: use HALIGN_4 on GEN7 for depth buffers | Chia-I Wu | 2014-01-14 | 1 | -11/+1 |
* | ilo: OOM for HiZ is fatal on GEN6 | Chia-I Wu | 2014-01-14 | 1 | -2/+7 |
* | ilo: fix a HiZ bo leakage | Chia-I Wu | 2014-01-14 | 1 | -0/+3 |
* | ilo: enable HiZ | Chia-I Wu | 2014-01-08 | 1 | -7/+41 |
* | ilo: rename and add an accessor for texture slices | Chia-I Wu | 2014-01-08 | 1 | -7/+9 |
* | ilo: add support for HiZ allocation | Chia-I Wu | 2014-01-08 | 1 | -1/+77 |
* | ilo: refactor separate stencil allocation | Chia-I Wu | 2014-01-08 | 1 | -20/+27 |
* | gallium, intel: Implements new __DRI_IMAGE_USE_LINEAR and PIPE_BIND_LINEAR fl... | Axel Davy | 2013-09-06 | 1 | -1/+1 |
* | ilo: honor surface padding requirements | Chia-I Wu | 2013-07-10 | 1 | -0/+53 |