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path: root/src/gallium/drivers/ilo/ilo_cp.h
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* ilo: remove unused ilo_cp functionsChia-I Wu2014-09-091-145/+0
| | | | | | | | | | | | | Remove ilo_cp_begin() ilo_cp_steal() ilo_cp_write() ilo_cp_write_multi() ilo_cp_write_bo() ilo_cp_end() ilo_cp_steal_ptr() ilo_cp_assert_no_implicit_flush()
* ilo: use ilo_builder for kernels and STATE_BASE_ADDRESSChia-I Wu2014-09-091-1/+5
| | | | | | Remove instruction buffer management from ilo_3d and adapt ilo_shader_cache to upload kernels to ilo_builder. To be able to do that, we also let ilo_builder manage STATE_BASE_ADDRESS.
* ilo: make ilo_cp based on ilo_builderChia-I Wu2014-09-091-75/+39
| | | | | This makes ilo_cp use the builder to manage batch buffers, and use ilo_builder_decode() to replace ilo_3d_pipeline_dump().
* ilo: replace domains by reloc flagsChia-I Wu2014-08-261-4/+4
| | | | | It is simpler and is supported by the kernel. It cannot be used with libdrm_intel yet though.
* ilo: move ring types to winsysChia-I Wu2014-03-101-10/+3
| | | | | It results in less code despite that i915_drm.h specifies the ring type as part of the execution flags.
* ilo: winsys may limit the batch buffer sizeChia-I Wu2014-03-101-1/+1
| | | | | | The maximum batch buffer size is determined at the time of drm_intel_bufmgr_gem_init(). Make sure the pipe driver does not exceed the limit.
* ilo: rework winsys bo reloc functionsChia-I Wu2014-03-101-5/+10
| | | | | | | | | | | | | Rename intel_bo_emit_reloc() to intel_bo_add_reloc(), intel_bo_clear_relocs() to intel_bo_truncate_relocs(), and intel_bo_references() to intel_bo_has_reloc(). Besides, we need intel_bo_get_offset() only to get the presumed offset afer adding a reloc entry. Remove the function and make intel_bo_add_reloc() return the presumed offset. While at it, switch to gem_bo->offset64 from gem_bo->offset.
* ilo: add ILO_DEBUG=flushChia-I Wu2013-08-201-2/+16
| | | | | | | | When specified, ilo will print a line similar to cp flushed for render with 949+888 DWords (22.4%) because of frame end for every ilo_cp_flush() call.
* ilo: get rid of function tables in winsysChia-I Wu2013-06-121-2/+2
| | | | | We are moving toward making struct intel_bo alias drm_intel_bo. As a first step, we cannot have function tables.
* ilo: replace cp hooks by cp owner and flush callbackChia-I Wu2013-05-211-37/+64
| | | | | | | | | | | | | | | The problem with cp hooks is that when we switch from 3D ring to 2D ring, and when there are active queries, we will emit 3D commands to 2D ring because the new-batch hook is called. This commit introduces the idea of cp owner. When the cp is flushed, or when another owner takes place, the current owner is notified, giving it a chance to emit whatever commands there need to be. With this mechanism, we can resume queries when the 3D pipeline owns the cp, and pause queries when it loses the cp. Ring switch will just work. As we still need to know when the cp bo is reallocated, a flush callback is added.
* ilo: harware contexts are only for the render ringChia-I Wu2013-05-211-1/+1
| | | | | The hardware context should not be passed for bo execution when the ring is not the render ring. Rename hw_ctx to render_ctx for clarity.
* ilo: allow one-off flags to be specified for CPChia-I Wu2013-05-011-0/+11
| | | | It will be used for SOL_RESET on GEN7.
* ilo: add command parserChia-I Wu2013-04-261-0/+325
The command parser manages batch buffers and command submissions.