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* freedreno: add a fd_resource_pitch helperJonathan Marek2020-07-081-7/+4
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5796>
* freedreno: Replace OUT_RELOCW with OUT_RELOC.Eric Anholt2020-05-121-7/+7
| | | | | | Final cleanup commit now that they're the same. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4967>
* freedreno/ir3: Remove unused half precision shader key flag.Eric Anholt2020-05-011-8/+0
| | | | | | | The code using it was removed in 4af86bd0b933 ("freedreno/ir3: remove half-precision output") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4562>
* freedreno: Make the slice pitch be bytes, not pixels.Eric Anholt2020-04-231-2/+2
| | | | | | | | | | | Back in a2xx, HW pitches were in pixels, so storing that was reasonable. Ever since then, the HW wants pitches in bytes, and we have only one instance of using pitch in pixels in the code (a3xx sysmem path). Flip things around so that only a2xx has to worry about the cpp for looking at pitches. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
* freedreno: Introduce a "cpp_shift" value for cpp divs/muls.Eric Anholt2020-04-231-1/+1
| | | | | | | This only converts part of the driver to use it, leaving the rest to the following commit (which inspired this one). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4558>
* freedreno: get GMEM state from batchRob Clark2020-01-291-12/+10
| | | | | | | Prep work to reduce churn in next patch. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno/a4xx: constify gmem stateRob Clark2020-01-291-10/+10
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: constify fd_vsc_pipeRob Clark2020-01-291-2/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: constify fd_tileRob Clark2020-01-291-4/+4
| | | | | | | | | In a following patch, when we cache the gmem state, we will want to treat the gmem state as immuatable. So start converting things to const to make this more clear.. fd_tile is a good place to start. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: consolidate GMEM stateRob Clark2020-01-291-2/+3
| | | | | | | | The tile and vsc_pipe arrays are really part of the GMEM configuration. So pull these out of fd_context and into fd_gmem_stateobj. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: extract vsc pipe bo from GMEM stateRob Clark2020-01-291-7/+6
| | | | | | | | | Prep work for reorganizing GMEM state and extracting out of fd_context. The vsc pipe bo was the one thing that doesn't change with GMEM/tile config. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
* freedreno: switch to layout helperRob Clark2019-11-261-5/+5
| | | | | | | | | | | | The slices table and most of the other layout fields in the freedreno_resource moves into fdl_layout. v2: Changes by anholt to not have duplicate fields, which was introducing a surprising behavior change in resource layout (using the level_linear helper before the setup of the shadowed fields) Reviewed-by: Eric Anholt <[email protected]> Acked-by: Rob Clark <[email protected]>
* freedreno: Convert the slice struct to the new resource header.Eric Anholt2019-11-261-2/+2
| | | | | | | | This gets the worst of the sed required for shared resource layout out of the way. The texture layout comment is dropped now that we're referencing the shared header, which has a more complete description. Acked-by: Rob Clark <[email protected]>
* freedreno: use rsc->slice accessor everywhereRob Clark2019-11-261-1/+1
| | | | | | | This will make it easier to extract the slice table out into a layout helper. Acked-by: Rob Clark <[email protected]>
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-141-1/+1
| | | | | | | | | | | | | | | To make PIPE_FORMATs usable from non-gallium parts of Mesa, I want to move their helpers out of gallium. Since u_format used util_copy_rect(), I moved that in there, too. I've put it in a separate directory in util/ because it's a big chunk of related code, and it's not clear to me whether we might want it as a separate library from libmesa_util at some point. Closes: #1905 Acked-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* freedreno: Rename vp and fp to vs and fs in fd_program_stateobjKristian H. Kristensen2019-09-251-2/+2
| | | | | | | | We're using vs and fs now, and adding hs, ds and gs soon. It's confusing enough that we have both DS/TCS and HS/TES. At least for VS and FS there doesn't have to be multiple names. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a4xx: call fd4_emit_ib() directly from fd4Rob Clark2019-08-131-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: use util_dynarray_clear instead of util_dynarray_resize(_, 0)Nicolai Hähnle2019-06-121-1/+1
| | | | | | | | | This is more expressive and simplifies a subsequent change. v2: - fix one more call-site after rebase Reviewed-by: Marek Olšák <[email protected]>
* freedreno: Silence compiler warnings about "*" in boolean context.Eric Anholt2019-05-131-1/+1
| | | | | | | It sure looks like we just want both of them to be nonzero, and && is probably going to be cheaper than * anyway. Reviewed-by: Kristian H. Kristensen <[email protected]>
* freedreno: Use enum values from matching enumKristian H. Kristensen2019-04-181-2/+2
| | | | | | | We get a couple of warnings from using mismatched enum values. This fixes that. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno: debug GEM obj namesRob Clark2018-12-131-1/+1
| | | | | | | With a recent enough kernel, set debug names for GEM BOs, which will show up in $debugfs/gem Signed-off-by: Rob Clark <[email protected]>
* freedreno: Remove the Emacs mode linesNeil Roberts2018-10-171-2/+0
| | | | | | | | | | | | | | | These are not necessary because the corresponding settings are set via the .dir-locals.el file anyway. Most of them were missing a ‘:’ after “tab-width” which was making Emacs display an annoying warning whenever you open the file. This patch was made with: sed -ri '/-\*- mode:/,/^$/d' \ $(find src/gallium/{drivers,winsys} -name \*.\[ch\] \ -exec grep -l -- '-\*- mode:' {} \+) Signed-off-by: Rob Clark <[email protected]>
* freedreno: handle invalidated buffers harderRob Clark2018-09-271-0/+3
| | | | | | Do a better job of skipping mem2gmem/gmem2mem.. Signed-off-by: Rob Clark <[email protected]>
* freedreno: remove use of u_transferRob Clark2017-12-041-2/+2
| | | | | | | Freedreno doesn't treat buffers and images differently, so it's use was kind of pointless. Signed-off-by: Rob Clark <[email protected]>
* freedreno: rename pipe -> vsc_pipeRob Clark2017-10-241-4/+4
| | | | | | | | To add context priority support we need to have an fd_pipe per context, rather than per-screen. Which conflicts with existing ctx->pipe (which is actually a visibility stream pipe (hw resource). So just rename it. Signed-off-by: Rob Clark <[email protected]>
* freedreno/gmem: fix hw binning hangs with large render targetsRob Clark2017-05-161-3/+4
| | | | | | | | On all 3 gens, we have 4 bits for width and height in the VSC pipe config. And overflow results in setting width and/or height to zero which causes hangs. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx+a4xx: move common VBOs to fd_contextRob Clark2016-08-131-5/+3
| | | | | | | | These are the same for a3xx and later. (a2xx could probably use them too, but due to limited hw support and ancient downstream kernels, it isn't so easy to test.) Signed-off-by: Rob Clark <[email protected]>
* freedreno: drop needs_rb_fbdRob Clark2016-07-301-8/+6
| | | | | | | | | | | We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this in fd_context is wrong when the gmem code executes asynchronously from the flush_queue worker. But in fact we don't really need to track it at all. We cannot assume previous value at the beginning of the batch (because of other processes potentially using the GPU), so just drop the tracking and emit it in _tile_init(). Signed-off-by: Rob Clark <[email protected]>
* freedreno: move needs_wfi into batchRob Clark2016-07-301-8/+8
| | | | | | | This is also used in gmem code, which executes from the "bottom half" (ie. from the flush_queue worker thread), so it cannot be in fd_context. Signed-off-by: Rob Clark <[email protected]>
* freedreno: re-order support for hw queriesRob Clark2016-07-301-2/+2
| | | | | | | | | | | Push query state down to batch, and use the resource tracking to figure out which batch(es) need to be flushed to get the query result. This means we actually need to allocate the prsc up front, before we know the size. So we have to add a special way to allocate an un- backed resource, and then later allocate the backing storage. Signed-off-by: Rob Clark <[email protected]>
* freedreno: move more batch related tracking to fd_batchRob Clark2016-07-301-58/+63
| | | | | | | | | | | | | | | | To flush batches out of order, the gmem code needs to not depend on state from fd_context (since that may apply to a more recent batch). So this all moves into batch. The one exception is the gmem/pipe/tile state itself. But this is only used from gmem code (and batches are flushed serially). The alternative would be having to re-calculate GMEM layout on every batch, even if the dimensions of the render targets are the same. Note: This opens up the possibility of pushing gmem/submit into a helper thread. Signed-off-by: Rob Clark <[email protected]>
* freedreno: introduce fd_batchRob Clark2016-07-301-3/+4
| | | | | | | | | | | | | | | | | | | Introduce the batch object, to track a batch/submit's worth of ringbuffers and other bookkeeping. In this first step, just move the ringbuffers into batch, since that is mostly uninteresting churn. For now there is just a single batch at a time. Note that one outcome of this change is that rb's are allocated/freed on each use. But the expectation is that the bo pool in libdrm_freedreno will save us the GEM bo alloc/free which was the initial reason to implement a rb pool in gallium. The purpose of the batch is to eventually facilitate out-of-order rendering, with batches associated to framebuffer state, and tracking the dependencies on other batches. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx+a4xx: fix potential null ptr derefRob Clark2016-06-021-1/+2
| | | | | | | | Coverity spotted the a3xx case (not sure why not the a4xx). CID 1362452 Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add debug callback to emitRob Clark2016-04-301-0/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: OUT_RELOC vs OUT_RELOCW fixesRob Clark2016-03-131-2/+2
| | | | | | Make sure we use OUT_RELOCW() in cases where the buffer is written to. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: hw binningRob Clark2016-03-131-7/+120
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: remove RB_RENDER_CONTROL patchingRob Clark2016-03-131-16/+8
| | | | | | | | | Bitfields where shuffled around for the better on a4xx, so we don't need any patching on this one. It appears to be something we set entirely in the gmem code so no conflict between tiling and render state like we had in a3xx. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: logic op handlingIlia Mirkin2015-11-201-2/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: fix srgb render targetsRob Clark2015-08-151-7/+15
| | | | | | Also fixes mipmap level generation for srgb textures. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: point-size and spritelist fixesRob Clark2015-08-121-0/+1
| | | | | | | | | a4xx needs similar treatment as 995f55a6 Also fixup a few point-size and vpsrepl issues and drop fix_blit_fp() hack previously needed for mem2gmem. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add s8/z32/z32_s8x24 supportRob Clark2015-08-101-24/+102
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: clear cached fp when switching blit progRob Clark2015-08-101-0/+2
| | | | | | | | | For gmem restore (mem2gmem), we swap blit programs, in order to have a different frag shader for depth vs color restore. But we weren't actually clearing the cached fp, so it would not actually change the frag shader as expected. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: MRT supportRob Clark2015-08-041-41/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: small bit of cleanup about max rendertargetsRob Clark2015-08-041-1/+1
| | | | | | | | We hard-coded 4 or 8 as the max in various places. Switch it all to a define since the limit will go up with a4xx (and maybe even again in the future?) Signed-off-by: Rob Clark <[email protected]>
* freedreno: convert blit program to array for each number of rtsIlia Mirkin2015-04-021-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: pass number of instances to drawRob Clark2015-02-241-2/+2
| | | | | | | a4xx has it's own draw packet, so needs equivalent update to what a3xx already got. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2015-02-211-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: bit of cleanupRob Clark2015-02-211-7/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: sysmem bypassRob Clark2015-01-201-3/+58
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: helper to calc layer/level offsetRob Clark2014-12-131-7/+8
| | | | | | | Rather than duplicating this everywhere. Especially as on a4xx the layout of layers and levels differs based on texture type. Signed-off-by: Rob Clark <[email protected]>
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