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* nir: gather which images are MSAAMarek Olšák2020-06-021-1/+0
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209>
* ttn: Implement disk cacheAxel Davy2020-05-131-2/+82
| | | | | | | | ttn is slow, let's disk cache it. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
* ttn: Add new allow_disk_cache parameterAxel Davy2020-05-132-2/+6
| | | | | | | | | | For now this parameter doesn't do anything. It means the implementation is allowed to use a cache on disk. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>
* tgsi_to_nir: translate non-vec4 image stores correctlyMarek Olšák2020-05-061-2/+5
| | | | | | | set the correct number of components for src data and the intrinsic Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4908>
* nir/tgsi: translate the interp locationDave Airlie2020-05-061-0/+5
| | | | | | | translate sample and centroid locations. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4122>
* tgsi_to_nir: handle TGSI_OPCODE_BARRIERMarek Olšák2020-04-301-0/+12
| | | | | Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
* tgsi_to_nir: handle TGSI_SEMANTIC_BLOCK_SIZEMarek Olšák2020-04-301-0/+4
| | | | | Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
* gallium: Fix setup of pstipple frag coord var.Eric Anholt2020-04-231-5/+1
| | | | | | | | | If the last input was a struct or matrix, we would have overlapped driver locations for our new position var. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4670>
* gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0Gert Wollny2020-04-141-0/+1
| | | | | | | | | | | | | | | | Since the alignment is now checked in the validator we must set it. v2: Use alignement of 4, i.e. dest bit size by eight. v3: Use alignment 16 (Rhys Perry & Jason Ekstand) v4: Use nir_intrinsic_set_align to make it clear that align offset is 0 (Jason) Fixes: e78a7a182524f091e2d77ba97bfbe057c3975cab nir: Assert memory loads are aligned Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4544>
* gallium/nir/tgsi: only scan fragment shader inputs for usage_maskDave Airlie2020-02-281-2/+5
| | | | | | | | The scanner doesn't work with tess shaders, but we don't need it for those, in fact only frag shaders need it. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* nir: fix 5 warningsMarek Olšák2020-02-271-1/+1
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
* tgsi_to_nir: set num_images and num_samplers with holes correctlyMarek Olšák2020-02-261-0/+14
| | | | | | | | | | This fixes the copy_uv shader from st/omx, because it uses image 0 and 2 and image 1 isn't declared. Cc: 20.0 <[email protected]> Reviewed-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
* tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().Eric Anholt2020-02-241-19/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
* glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.Eric Anholt2020-02-051-99/+3
| | | | | | | | | | | | | | | | | This means you can directly use format utils on it without having to have your own GL enum to number-of-components switch statement (or whatever) in your vulkan backend. Thanks to imirkin for fixing up the nouveau driver (and a couple of core details). This fixes the computed qualifiers for EXT_shader_image_load_store's non-integer sizeNxM qualifiers, which we don't have tests for. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> (v3d) Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
* spirv,nir: add new lod parameter to image_{load,store} intrinsicsSamuel Pitoiset2020-01-091-0/+5
| | | | | | | | | | | | SPV_AMD_shader_image_load_store_lod allows to use a lod parameter with OpImageRead, OpImageWrite and OpImageSparseRead. According to the specification, this parameter should be a 32-bit integer. It is initialized to 0 when no lod parameter is found during SPIR-V->NIR translation. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* llvmpipe/nir: handle texcoord requirementsDave Airlie2019-12-121-2/+2
| | | | | | Switch to using texcoord intrinsic support. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add nir lowering passes for the draw pipe stages. (v2)Dave Airlie2019-11-282-0/+412
| | | | | | | | This transforms the NIR shaders like the TGSI transforms worked. v2: fix some nir info requirements, use 32-bit bools Acked-by: Roland Scheidegger <[email protected]>
* gallivm: nir->tgsi info convertor (v2)Dave Airlie2019-11-282-0/+808
| | | | | | | | | | | This is a port of the old radeonsi code to be used for llvmpipe NIR support. Once we remove TGSI support from llvmpipe (I can dream? :-), then we should be able to refine most of this down and remove it. v2: port to later radeonsi code for vertex inputs and sampler/io parsing. Acked-by: Roland Scheidegger <[email protected]>
* nir: move data.image.access to data.accessMarek Olšák2019-11-191-2/+2
| | | | | | The size of the data structure doesn't change. Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: use pipe_screen::finalize_nirMarek Olšák2019-10-231-4/+9
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* tgsi_to_nir: use nir_shader_compiler_options::lower_to_scalarMarek Olšák2019-10-101-5/+3
| | | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* tgsi_to_nir: add #ifdef header guardsMarek Olšák2019-10-101-0/+5
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* tgsi_to_nir: handle PIPE_FORMAT_NONE in image opcodesMarek Olšák2019-09-301-0/+3
| | | | | | radeonsi doesn't use the format and internal shaders don't set it. Reviewed-By: Timur Kristóf <[email protected]>
* tgsi_to_nir: fix 2-component system values like tess_level_inner_defaultMarek Olšák2019-09-231-1/+3
| | | | | Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* tgsi_to_nir: fix masked out image loadsMarek Olšák2019-09-231-2/+1
| | | | | | | This caused a failure in NIR validation. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* tgsi_to_nir: Translate TGSI_INTERPOLATE_COLOR as INTERP_MODE_NONEDanylo Piliaiev2019-09-121-1/+1
| | | | | | | | | | | | | | | | Translating TGSI_INTERPOLATE_COLOR as INTERP_MODE_SMOOTH made it for drivers impossible to have flatshaded color inputs. Translate it to INTERP_MODE_NONE which drivers interpret as smooth or flat depending on flatshading state. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111467 Fixes: 770faf54 ("tgsi_to_nir: Improve interpolation modes.") Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: VARYING_SLOT_PSIZ and VARYING_SLOT_FOGC are scalarIago Toral Quiroga2019-09-121-0/+10
| | | | Reviewed-by: Eric Anholt <[email protected]>
* prog_to_nir, tgsi_to_nir: make sure kill doesn't discard NaNsMarek Olšák2019-09-111-0/+4
| | | | Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: Remove dependency on libglsl.Timur Kristóf2019-09-061-9/+16
| | | | | | | | | This commit removes the GLSL dependency in TTN by manually recording the textures used and calling nir_lower_samplers instead of its GL counterpart. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: allow specifying filter callback in lower_alu_to_scalarVasily Khoruzhick2019-09-061-1/+1
| | | | | | | | | | | | | Set of opcodes doesn't have enough flexibility in certain cases. E.g. Utgard PP has vector conditional select operation, but condition is always scalar. Lowering all the vector selects to scalar increases instruction number, so we need a way to filter only those ops that can't be handled in hardware. Reviewed-by: Qiang Yu <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* ttn: fix 64-bit shift on 32-bit `1`Eric Engestrom2019-09-041-1/+1
| | | | | | | | Fixes: 4d0b2c7aaac3cf3de5af ("ttn: Update shader->info as we generate code.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* ttn: Fill out more info fieldsConnor Abbott2019-09-031-0/+4
| | | | | | We'll use these in radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* tgsi_to_nir: only update TGSI properties of the current shader stageJose Maria Casanova Crespo2019-08-201-9/+18
| | | | | | | | | | | | | | | | | | The implementation introduced in "tgsi_to_nir: be careful about not losing any TGSI properties silently (v2)" updates all the TGSI properties, but it didn't take into account that the shader_info structure uses a union to store the different attributes for each shader stage. Now we only update the attributes if they affect current shader stage, avoiding to overwrite members of the union that should be overwritten. This has created hundreds of regressions in v3d. For example the TGSI_PROPERTY_VS_BLIT_SGPRS_AMD was overwritting the same position used by TGSI_PROPERY_CS_FIXED_BLOCK_DEPTH. Fixes: e3003651978 ("tgsi_to_nir: be careful about not losing any TGSI properties silently (v2)") Reviewed-by: Marek Olšák <[email protected]>
* tgsi_to_nir: add assertions for max varying slotsMarek Olšák2019-08-131-0/+2
| | | | | | Nine uses GENERIC slots > 31. Trivial.
* tgsi_to_nir: expand vec3 system values to vec4Marek Olšák2019-08-131-0/+3
| | | | | | for nir_intrinsic_load_work_group_id Reviewed-by: Eric Anholt <[email protected]>
* tgsi_to_nir: fix incorrect number of image src1 componentsMarek Olšák2019-08-131-4/+1
| | | | Reviewed-by: Eric Anholt <[email protected]>
* compiler: add SYSTEM_VALUE_TESS_LEVEL_OUTER/INNER_DEFAULTMarek Olšák2019-08-121-0/+8
| | | | | | TCS system values for internal passthru TCS, needed by radeonsi NIR support Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: handle tess level inner/outer varyingsMarek Olšák2019-08-121-0/+7
| | | | | | | | for internal radeonsi shaders Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: add support for the stencil FS outputMarek Olšák2019-08-121-5/+12
| | | | | | Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: add support for TEX_LZMarek Olšák2019-08-121-2/+9
| | | | | Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* compiler: add SYSTEM_VALUE_USER_DATA_AMDMarek Olšák2019-08-121-0/+4
| | | | for internal radeonsi shaders
* compiler: add shader_info.cs.user_data_components_amdMarek Olšák2019-08-121-0/+3
|
* tgsi_to_nir: add basic compute shader supportMarek Olšák2019-08-121-0/+23
| | | | | | Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: add support for LOAD & STORE with SSBOs and imagesMarek Olšák2019-08-121-2/+310
| | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: make setup_texture_info reusableMarek Olšák2019-08-121-36/+48
| | | | | Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* tgsi_to_nir: add support for TXF_LZMarek Olšák2019-08-121-4/+13
| | | | | | Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* compiler: add shader_info.vs.blit_sgprs_amdMarek Olšák2019-08-121-0/+3
| | | | for internal radeonsi shaders
* tgsi_to_nir: be careful about not losing any TGSI properties silently (v2)Marek Olšák2019-08-121-1/+48
| | | | | | | | v2: squash with Timur Kristof's commit Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* tgsi_to_nir: add a few needed double opcodesMarek Olšák2019-08-061-0/+6
| | | | | | | | | for internal radeonsi shaders v2 (Connor): - Split out prep work from adding opcodes, and rewrite the former Reviewed-by: Marek Olšák <[email protected]>
* tgsi_to_nir: implement a few needed 64-bit integer opcodesMarek Olšák2019-08-061-0/+5
| | | | | | | | | | for internal radeonsi shaders v2 (Connor): - Split this out from the prep work, and rework the former - Add support for U64SNE Reviewed-by: Marek Olšák <[email protected]>
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