aboutsummaryrefslogtreecommitdiffstats
path: root/src/freedreno
Commit message (Expand)AuthorAgeFilesLines
* freedreno/a6xx: document LRZ flag bufferRob Clark2020-05-291-1/+32
* turnip: support VkImageDrmFormatModifierExplicitCreateInfoEXTJonathan Marek2020-05-273-17/+54
* freedreno/layout: add explicit offset/pitch argument to fdl6_layoutJonathan Marek2020-05-275-10/+34
* freedreno/ir3: Avoid {0} initializer for struct reginfoKristian H. Kristensen2020-05-261-3/+4
* turnip: Use {} initializer to silence warningKristian H. Kristensen2020-05-261-1/+1
* turnip: Use tu6_reduction_mode() to avoid warningKristian H. Kristensen2020-05-261-2/+10
* turnip: Use hw enum when emitting A6XX_RB_STENCIL_CONTROLKristian H. Kristensen2020-05-261-1/+1
* freedreno: Use explicit *_NONE enum for undefined formatsKristian H. Kristensen2020-05-265-3/+23
* freedreno/ir3: Use RESINFO for a6xx image size queries.Eric Anholt2020-05-266-9/+43
* freedreno/ir3: Move handle_bindless_cat6 to compiler_nir and reuse.Eric Anholt2020-05-263-22/+19
* freedreno/ir3: Refactor out IBO source references.Eric Anholt2020-05-264-57/+37
* freedreno: Set the immediate flag in a4/a5xx resinfos.Eric Anholt2020-05-263-14/+26
* freedreno: Fix resinfo asm, which doesn't have srcs besides IBO number.Eric Anholt2020-05-261-14/+20
* freedreno: Add more resinfo/ldgb testcases.Eric Anholt2020-05-261-0/+23
* freedreno: Fix printing of unused src in disasm of cat6 RESINFO.Eric Anholt2020-05-262-7/+11
* tu: Add missing storage image/texel buffer bitsConnor Abbott2020-05-261-0/+20
* tu: Respect VK_IMAGE_CREATE_MUTABLE_FORMAT_BITConnor Abbott2020-05-261-2/+13
* tu: Fix IBO descriptor for cubesConnor Abbott2020-05-261-16/+17
* freedreno/drm: disallow exported buffers in bo cacheRob Clark2020-05-251-0/+1
* Properly check mmap return valueHanno Böck2020-05-221-1/+1
* freedreno/a5xx: Define the 2D blit UBWC pitch fieldsEric Anholt2020-05-211-0/+2
* freedreno/a5xx: Set MIN_LAYERSZ on 3D textures like we do on a6xx.Eric Anholt2020-05-211-0/+13
* freedreno/a5xx: Add the outline of a unit test for a5xx layout.Eric Anholt2020-05-213-33/+149
* freedreno/fdl: Separate the list of a6xx testcases from the the test code.Eric Anholt2020-05-214-93/+149
* freedreno/a5xx: Move resource layout to fdl.Eric Anholt2020-05-213-0/+146
* freedreno: reduce extra height alignment in a6xx layoutJonathan Marek2020-05-201-3/+3
* turnip: enable 422_UNORM formatsJonathan Marek2020-05-203-13/+45
* turnip: implement VK_KHR_sampler_ycbcr_conversionJonathan Marek2020-05-208-32/+231
* freedreno/registers: document 422_UNORM and 420_UNORM formatsJonathan Marek2020-05-201-1/+26
* tu: Support VK_FORMAT_FEATURE_BLIT_SRC_BIT for texture-only formatsConnor Abbott2020-05-191-2/+2
* tu: Fix buffer compressed pitch calculation with unaligned sizesConnor Abbott2020-05-191-13/+18
* tu: Fall back to 3d blit path for BC1_RGB_* formatsConnor Abbott2020-05-191-1/+11
* tu: Always initialize image_view fields for blit sourcesConnor Abbott2020-05-191-26/+28
* freedreno/ir3/validate: add checking for types and opcodesRob Clark2020-05-193-59/+60
* freedreno/ir3: add helpers to deal with src/dst typesRob Clark2020-05-194-8/+122
* freedreno/ir3: add simple validate passRob Clark2020-05-195-2/+139
* freedreno/ir3: fix mismatched wrmask for overlapping VS inputsRob Clark2020-05-191-0/+33
* freedreno/ir3/cp: fix cmps foldingRob Clark2020-05-191-1/+2
* freedreno/ir3/print: print cat2 conditionRob Clark2020-05-191-0/+22
* freedreno/ir3: fix immed type in create_addr0()Rob Clark2020-05-191-24/+6
* freedreno/ir3/cf: handle multiple cov's properlyRob Clark2020-05-191-8/+19
* freedreno/ir3: fix mismatched flags on splitRob Clark2020-05-191-1/+3
* freedreno/ir3/group: fix for half-regsRob Clark2020-05-192-2/+6
* freedreno/ir3: make input/output iterators declare cursor ptrRob Clark2020-05-199-19/+9
* freedreno/ir3: make foreach_ssa_src declar cursor ptrRob Clark2020-05-198-16/+4
* freedreno/ir3: make foreach_src declare cursor ptrRob Clark2020-05-198-22/+6
* freedreno/ir3: be iterativeRob Clark2020-05-192-4/+18
* freedreno/ir3: move where we preserve binning pass inputsRob Clark2020-05-191-17/+16
* freedreno/ir3: add IR3_PASS() macroRob Clark2020-05-192-24/+15
* freedreno/ir3/postsched: report progressRob Clark2020-05-193-29/+16