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ir3
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Author
Age
Files
Lines
*
nir/lower_atomics_to_ssbo: Also lower barriers
Jason Ekstrand
2020-01-13
1
-2
/
+0
*
nir: Rename nir_intrinsic_barrier to control_barrier
Jason Ekstrand
2020-01-13
2
-3
/
+3
*
nir: Add a new memory_barrier_tcs_patch intrinsic
Jason Ekstrand
2020-01-13
1
-0
/
+1
*
ir3: Set up full/half register conflicts correctly
Kristian H. Kristensen
2020-01-09
1
-2
/
+1
*
freedreno/ir3: fix flat shading again
Rob Clark
2019-12-24
1
-1
/
+1
*
freedreno/ir3: support load_base_instance
Jonathan Marek
2019-12-19
4
-1
/
+12
*
freedreno/ir3: fix vertex shader sysvals with pre_assign_inputs
Jonathan Marek
2019-12-19
1
-1
/
+1
*
freedreno/ir3: update prefetch input_offset when packing inlocs
Jonathan Marek
2019-12-17
1
-0
/
+4
*
freedreno/ir3: lower pack/unpack ops
Jonathan Marek
2019-12-16
1
-0
/
+24
*
freedreno/ir3: lower mul_2x32_64
Jonathan Marek
2019-12-16
1
-0
/
+3
*
turnip: Lower usub_borrow.
Eric Anholt
2019-12-16
1
-0
/
+2
*
freedreno/ir3: add iterator macros
Rob Clark
2019-12-13
13
-76
/
+93
*
freedreno/ir3: add scheduler traces
Rob Clark
2019-12-13
4
-0
/
+24
*
freedreno/ir3: add last-baryf shaderdb stat
Rob Clark
2019-12-13
2
-0
/
+6
*
freedreno/ir3: add GLSL_SAMPLER_DIM_SUBPASS to tex_info
Jonathan Marek
2019-12-12
1
-0
/
+2
*
freedreno: Track the set of UBOs to be uploaded in UBO analysis.
Eric Anholt
2019-12-09
2
-0
/
+4
*
freedreno/ir3: fix neverball assert in case of unused VS inputs
Rob Clark
2019-12-04
2
-4
/
+19
*
freedreno/ir3: remove store_output lowered to store_shared_ir3
Rob Clark
2019-12-04
1
-1
/
+1
*
freedreno/ir3: enable half precision for pre-fs texture fetch
Hyunjun Ko
2019-11-20
1
-1
/
+1
*
freedreno/ir3: fixup when changing to mad.f16
Hyunjun Ko
2019-11-20
1
-1
/
+5
*
freedreno/ir3: fix printing output registers of FS.
Hyunjun Ko
2019-11-20
1
-2
/
+3
*
freedreno/ir3: Enabling lowering 16-bit flrp
Neil Roberts
2019-11-20
1
-0
/
+2
*
freedreno: support 16b for the sampler opcode
Hyunjun Ko
2019-11-20
2
-18
/
+38
*
freedreno/ir3: Implement f2b16 and i2b16
Neil Roberts
2019-11-20
1
-0
/
+12
*
freedreno/ir3: Add implementation of nir_op_b16csel
Neil Roberts
2019-11-20
1
-5
/
+15
*
freedreno/ir3: Support 16-bit comparison instructions
Neil Roberts
2019-11-20
1
-0
/
+20
*
freedreno/ir3: cleanup by removing repeated code
Hyunjun Ko
2019-11-20
1
-12
/
+5
*
freedreno/ir3: disable texture prefetch for 1d array textures
Jonathan Marek
2019-11-17
1
-6
/
+5
*
util: Move gallium's PIPE_FORMAT utils to /util/format/
Eric Anholt
2019-11-14
1
-1
/
+1
*
freedreno/ir3: remove unused parameter
Rob Clark
2019-11-12
1
-4
/
+4
*
freedreno/ir3: legalize cleanups
Rob Clark
2019-11-12
1
-1
/
+7
*
freedreno/ir3: fix gpu hang with pre-fs-tex-fetch
Rob Clark
2019-11-12
2
-10
/
+32
*
freedreno/ir3: only tex instructions have wrmask
Rob Clark
2019-11-12
1
-6
/
+3
*
freedreno/ir3: re-work shader inputs/outputs
Rob Clark
2019-11-12
5
-270
/
+192
*
freedreno/ir3: simplify creating sysval inputs
Rob Clark
2019-11-12
1
-90
/
+58
*
freedreno/ir3: remove first-vertex sysval
Rob Clark
2019-11-12
1
-1
/
+0
*
freedreno/ir3: helper to print ir if debug enabled
Rob Clark
2019-11-12
2
-28
/
+16
*
freedreno/ir3: show input/output wrmask's in disasm
Rob Clark
2019-11-12
1
-2
/
+9
*
freedreno/ir3: add input/output iterators
Rob Clark
2019-11-12
11
-63
/
+49
*
freedreno/ir3: remove impossible condition
Rob Clark
2019-11-12
1
-3
/
+0
*
freedreno/ir3: rename fanin/fanout to collect/split
Rob Clark
2019-11-12
10
-44
/
+48
*
freedreno/ir3: remove half-precision output
Rob Clark
2019-11-12
1
-30
/
+0
*
freedreno/ir3: fix valgrind complaint with STLW
Rob Clark
2019-11-12
1
-1
/
+1
*
freedreno/ir3: also track # of nops for shader-db
Rob Clark
2019-11-09
2
-0
/
+4
*
freedreno/ir3: sync disasm changes from envytools
Rob Clark
2019-11-09
2
-24
/
+94
*
freedreno/ir3: remove obsolete comment
Rob Clark
2019-11-09
1
-4
/
+0
*
freedreno/ir3/ra: remove ir print after livein/out
Rob Clark
2019-11-09
1
-1
/
+0
*
freedreno/ir3/ra: move regs_count==0 check
Rob Clark
2019-11-09
1
-9
/
+2
*
freedreno/ir3: ir3_print tweaks
Rob Clark
2019-11-09
2
-47
/
+102
*
freedreno/ir3: use SSA flag on dest register too
Rob Clark
2019-11-09
4
-45
/
+48
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