aboutsummaryrefslogtreecommitdiffstats
path: root/src/broadcom
Commit message (Expand)AuthorAgeFilesLines
* v3d: Be more explicit about include directory from our generated code.Eric Anholt2018-06-051-1/+1
* v3d: Add support for glSampleMask / glSampleCoverage.Eric Anholt2018-05-172-0/+10
* v3d: Enable NaN propagation in the VS and CS as well.Eric Anholt2018-05-173-3/+9
* v3d: Rename the driver files from "vc5" to "v3d".Eric Anholt2018-05-162-1/+1
* v3d: Rename the vc5_dri.so driver to v3d_dri.so.Eric Anholt2018-05-162-8/+8
* android: change include "cutils/log.h" to "log/log.h" on Android API >=26jenny.q.cao2018-05-141-0/+4
* broadcom/vc5: Add support for centroid varyings.Eric Anholt2018-04-263-0/+44
* broadcom/vc5: Add validation that we don't violate GFXH-1633 requirements.Eric Anholt2018-04-261-0/+13
* broadcom/vc5: Add validation that we don't violate GFXH-1625 requirements.Eric Anholt2018-04-261-0/+5
* broadcom/vc5: Add QPU validation for register writes after thrend.Eric Anholt2018-04-261-3/+31
* broadcom/vc5: Remove leftover vc4 MSAA lowering setup in the FS key.Eric Anholt2018-04-251-12/+5
* broadcom/vc5: Fix tile load/store of MSAA surfaces on 4.x.Eric Anholt2018-04-252-4/+4
* util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_t...Ian Romanick2018-03-291-2/+2
* broadcom/vc4: Fix out-of-tree build with automake.Aaron Watry2018-03-281-0/+2
* broadcom/vc5: Start using nir_opt_move_load_ubo().Eric Anholt2018-03-281-0/+2
* broadcom/vc5: Fix extraneous register index in QIR dumping of TLBU writes.Eric Anholt2018-03-261-0/+1
* broadcom/vc5: Account for InstanceID/VertexID in VPM segment size.Eric Anholt2018-03-221-4/+9
* broadcom/vc5: Set up a vertex position if the shader doesn't.Eric Anholt2018-03-221-0/+22
* broadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.Eric Anholt2018-03-212-0/+38
* broadcom/vc5: Don't annotate dumps with stale live intervals.Eric Anholt2018-03-194-2/+8
* broadcom/vc5: Add support for register spilling.Eric Anholt2018-03-194-11/+276
* broadcom/vc5: Remove redundant last_inst lookup.Eric Anholt2018-03-191-1/+0
* broadcom/vc5: On QPU pack error, dump the instruction and return cleanly.Eric Anholt2018-03-191-1/+7
* broadcom/vc5: Add cursors to the compiler infrastructure, like NIR's.Eric Anholt2018-03-193-8/+73
* broadcom/vc5: Move the umul macro to a header.Eric Anholt2018-03-192-8/+8
* broadcom/vc5: Correct the arg count of TIDX/EIDX.Eric Anholt2018-03-191-2/+2
* broadcom/vc5: Re-do live variables after removing thrsws.Eric Anholt2018-03-192-3/+14
* broadcom/vc5: Add a QPU helper for instructions using the TLB.Eric Anholt2018-03-192-0/+23
* broadcom/vc5: Introduce v3d_qpu_reads_vpm()/v3d_qpu_writes_vpm().Eric Anholt2018-03-192-4/+35
* broadcom/vc5: The ldvpm signal also a case of using the VPM.Eric Anholt2018-03-191-0/+3
* broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.Eric Anholt2018-03-193-6/+12
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-281-0/+1
* broadcom/vc5: Fix "hardwrae" typo in a field name in XML.Eric Anholt2018-02-052-2/+2
* broadcom/vc5: Try to merge more than 2 QPU instructions together.Eric Anholt2018-02-051-5/+13
* broadcom/vc5: Remove no-op MOVs after register allocation.Eric Anholt2018-02-051-1/+60
* broadcom/vc5: Add missing shader-db instruction counting.Eric Anholt2018-02-051-0/+7
* broadcom/vc5: Fix a segfault on mix of booleans.Eric Anholt2018-02-011-1/+3
* nir: add lower_all_io_to_temps flagTimothy Arceri2018-01-311-0/+1
* broadcom/vc5: Enable CLIF dumping of V3D 4.2.Eric Anholt2018-01-273-1/+10
* broadcom/vc5: Update the compiler for V3D 4.2.Eric Anholt2018-01-271-2/+6
* broadcom/vc5: Update QPU instruction pack/unpack for v4.2.Eric Anholt2018-01-274-5/+9
* broadcom/vc5: Add XML for V3D 4.2.Eric Anholt2018-01-276-0/+1065
* broadcom/vc5: Fix a race between XML codegen build and CLIF build.Eric Anholt2018-01-271-1/+4
* Android: Attempt to fix broadcom build after vc5 changes.Eric Anholt2018-01-271-0/+5
* autotools: include meson build files in tarballDylan Baker2018-01-191-1/+6
* broadcom: add missing headers to the tarballEmil Velikov2018-01-181-2/+5
* broadcom/vc5: Use MSF to ignore discards/non-dispatched channels in loops.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Use XOR instead of SUB for execute flags comparisons.Eric Anholt2018-01-121-3/+3
* broadcom/vc5: Also check the update flags for avoiding DCE.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Rename V3D 3.x Flat Shade Action to match v4.x naming.Eric Anholt2018-01-121-3/+3
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 19:11:28 +0000