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Commit message (
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Author
Age
Files
Lines
*
v3d: Add support for the TMUWT instruction.
Eric Anholt
2018-07-31
3
-3
/
+13
*
vc4: Fix meson build when enabled without v3d.
Eric Anholt
2018-07-29
1
-0
/
+2
*
nir: Add flipping of gl_PointCoord.y in nir_lower_wpos_ytransform.
Eric Anholt
2018-07-26
1
-0
/
+1
*
v3d: Implement a small immediates optimization, based on VC4's.
Eric Anholt
2018-07-23
7
-19
/
+142
*
v3d: Return an invalid src number if asked for a missing implicit uniform.
Eric Anholt
2018-07-23
2
-3
/
+3
*
v3d: Skip emitting texture config parameter 2 if it's just the defaults.
Eric Anholt
2018-07-23
1
-1
/
+5
*
v3d: Update an XXX comment for a path we handled in HW on V3D 4.x.
Eric Anholt
2018-07-23
1
-1
/
+1
*
v3d: Switch to using the new SFU instructions on V3D 4.x.
Eric Anholt
2018-07-23
6
-24
/
+87
*
v3d: Fix the name of the "flpop" operation.
Eric Anholt
2018-07-23
2
-2
/
+2
*
v3d: Drop unused vir_SAT() operation.
Eric Anholt
2018-07-23
1
-8
/
+0
*
v3d: Rotate through registers to improve post-RA scheduling options.
Eric Anholt
2018-07-23
1
-0
/
+45
*
v3d: Allow reading from physical regs written in the previous instruction.
Eric Anholt
2018-07-23
1
-24
/
+0
*
v3d: Disable shader-db cycle estimates until we sort out TMU estimates.
Eric Anholt
2018-07-16
1
-1
/
+4
*
v3d: Emit the lowered uniform just before its first use in a block.
Eric Anholt
2018-07-16
1
-20
/
+18
*
v3d: Add an assert that we don't provide an invalid texture return words.
Eric Anholt
2018-07-16
1
-0
/
+8
*
v3d: Apply GFXH-1625 restriction on TMUWT in the end of the shader.
Eric Anholt
2018-07-16
1
-0
/
+4
*
v3d: Implement noperspective varyings on V3D 4.x.
Eric Anholt
2018-07-09
3
-3
/
+8
*
v3d: Add support for GL_SAMPLE_ALPHA_TO_ONE.
Eric Anholt
2018-07-05
1
-0
/
+3
*
v3d: Respect swap_color_rb for the f32_color_rb case.
Eric Anholt
2018-07-05
1
-5
/
+7
*
v3d: Implement ALPHA_TO_COVERAGE.
Eric Anholt
2018-06-20
2
-2
/
+15
*
v3d: Limit shader threading according to our maximum TMU fifo usage.
Eric Anholt
2018-06-15
1
-10
/
+24
*
v3d: Fix shaders using pixel center W but no varyings.
Eric Anholt
2018-06-15
3
-15
/
+8
*
v3d: Fix configuration setup of mixed f32 and f16 render targets.
Eric Anholt
2018-06-14
1
-1
/
+1
*
v3d: Remove unused QUNIFORM_STENCIL left over from vc4.
Eric Anholt
2018-06-14
1
-2
/
+0
*
v3d: Fix undefined results for a swap_color_rb RT from a float shader output.
Eric Anholt
2018-06-14
1
-1
/
+4
*
v3d: Enable the new NIR bitfield operation lowering paths.
Eric Anholt
2018-06-06
1
-2
/
+19
*
broadcom/vc5: Add support for centroid varyings.
Eric Anholt
2018-04-26
3
-0
/
+44
*
broadcom/vc5: Add validation that we don't violate GFXH-1633 requirements.
Eric Anholt
2018-04-26
1
-0
/
+13
*
broadcom/vc5: Add validation that we don't violate GFXH-1625 requirements.
Eric Anholt
2018-04-26
1
-0
/
+5
*
broadcom/vc5: Add QPU validation for register writes after thrend.
Eric Anholt
2018-04-26
1
-3
/
+31
*
broadcom/vc5: Remove leftover vc4 MSAA lowering setup in the FS key.
Eric Anholt
2018-04-25
1
-12
/
+5
*
util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_t...
Ian Romanick
2018-03-29
1
-2
/
+2
*
broadcom/vc5: Start using nir_opt_move_load_ubo().
Eric Anholt
2018-03-28
1
-0
/
+2
*
broadcom/vc5: Fix extraneous register index in QIR dumping of TLBU writes.
Eric Anholt
2018-03-26
1
-0
/
+1
*
broadcom/vc5: Account for InstanceID/VertexID in VPM segment size.
Eric Anholt
2018-03-22
1
-4
/
+9
*
broadcom/vc5: Set up a vertex position if the shader doesn't.
Eric Anholt
2018-03-22
1
-0
/
+22
*
broadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.
Eric Anholt
2018-03-21
2
-0
/
+38
*
broadcom/vc5: Don't annotate dumps with stale live intervals.
Eric Anholt
2018-03-19
4
-2
/
+8
*
broadcom/vc5: Add support for register spilling.
Eric Anholt
2018-03-19
4
-11
/
+276
*
broadcom/vc5: Remove redundant last_inst lookup.
Eric Anholt
2018-03-19
1
-1
/
+0
*
broadcom/vc5: On QPU pack error, dump the instruction and return cleanly.
Eric Anholt
2018-03-19
1
-1
/
+7
*
broadcom/vc5: Add cursors to the compiler infrastructure, like NIR's.
Eric Anholt
2018-03-19
3
-8
/
+73
*
broadcom/vc5: Move the umul macro to a header.
Eric Anholt
2018-03-19
2
-8
/
+8
*
broadcom/vc5: Correct the arg count of TIDX/EIDX.
Eric Anholt
2018-03-19
1
-2
/
+2
*
broadcom/vc5: Re-do live variables after removing thrsws.
Eric Anholt
2018-03-19
2
-3
/
+14
*
broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.
Eric Anholt
2018-03-19
1
-6
/
+1
*
nir: add lower_ldexp to nir compiler options
Timothy Arceri
2018-02-28
1
-0
/
+1
*
broadcom/vc5: Try to merge more than 2 QPU instructions together.
Eric Anholt
2018-02-05
1
-5
/
+13
*
broadcom/vc5: Remove no-op MOVs after register allocation.
Eric Anholt
2018-02-05
1
-1
/
+60
*
broadcom/vc5: Add missing shader-db instruction counting.
Eric Anholt
2018-02-05
1
-0
/
+7
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