| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | broadcom/vc5: Add support for register spilling. | Eric Anholt | 2018-03-19 | 1 | -4/+240 |
| * | broadcom/vc5: Use THRSW to enable multi-threaded shaders. | Eric Anholt | 2018-01-12 | 1 | -25/+21 |
| * | broadcom/vc5: Use a physical-reg-only register class for LDVPM. | Eric Anholt | 2018-01-12 | 1 | -7/+19 |
| * | broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1. | Eric Anholt | 2018-01-12 | 1 | -0/+22 |
| * | broadcom/vc5: Add support for V3Dv4 signal bits. | Eric Anholt | 2018-01-12 | 1 | -2/+2 |
| * | broadcom: Add VC5 NIR compiler. | Eric Anholt | 2017-10-10 | 1 | -0/+254 |
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