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path: root/src/broadcom/compiler/qpu_schedule.c
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* v3d: Avoid scheduling an instruction that stalls waiting for SFU retvalJose Maria Casanova Crespo2019-07-221-4/+23
* v3d: add shader-db stat to count SFU stallsJose Maria Casanova Crespo2019-07-221-0/+45
* v3d: handle tlb read dependency tracking as if they were writesIago Toral Quiroga2019-07-121-1/+1
* v3d: instructions with the ldtlb and ldtlbu signals are tlb instructionsIago Toral Quiroga2019-07-121-0/+3
* v3d: implement simultaneous peripheral access exceptions for V3D 4.1+Iago Toral Quiroga2019-06-181-6/+32
* v3d: fix scheduling dependency tracking for ALU with small immediatesIago Toral Quiroga2019-06-061-1/+4
* v3d: Fix leak of the mem_ctx after the DAG refactor.Eric Anholt2019-03-121-2/+2
* v3d: Use the DAG datastructure for QPU instruction scheduling.Eric Anholt2019-03-111-114/+72
* v3d: Reuse list_for_each_entry_rev().Eric Anholt2019-03-111-2/+2
* v3d: Switch implicit uniforms over to being any qinst->uniform != ~0.Eric Anholt2019-03-051-1/+1
* v3d: Add a helper function for getting a nop register.Eric Anholt2019-02-181-1/+1
* v3d: Add support for CS barrier() intrinsics.Eric Anholt2019-01-141-0/+10
* v3d: Move "does this instruction have flags" from sched to generic helpers.Eric Anholt2018-12-301-39/+4
* v3d: Drop incorrect dependency for flpop.Eric Anholt2018-12-301-4/+0
* v3d: Drop in a bunch of notes about performance improvement opportunities.Eric Anholt2018-12-141-0/+13
* v3d: Make sure that a thrsw doesn't split a multop from its umul24.Eric Anholt2018-12-141-0/+1
* v3d: Use combined input/output segments.Eric Anholt2018-12-071-1/+21
* v3d: Make sure we don't emit a thrsw before the last one finished.Eric Anholt2018-08-061-2/+13
* v3d: Add support for the TMUWT instruction.Eric Anholt2018-07-311-3/+6
* v3d: Implement a small immediates optimization, based on VC4's.Eric Anholt2018-07-231-1/+2
* v3d: Switch to using the new SFU instructions on V3D 4.x.Eric Anholt2018-07-231-5/+7
* v3d: Fix the name of the "flpop" operation.Eric Anholt2018-07-231-1/+1
* v3d: Allow reading from physical regs written in the previous instruction.Eric Anholt2018-07-231-24/+0
* v3d: Apply GFXH-1625 restriction on TMUWT in the end of the shader.Eric Anholt2018-07-161-0/+4
* broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.Eric Anholt2018-03-191-6/+1
* broadcom/vc5: Try to merge more than 2 QPU instructions together.Eric Anholt2018-02-051-5/+13
* broadcom/vc5: Add compiler support for V3D 4.x texturing.Eric Anholt2018-01-121-0/+15
* broadcom/vc5: Use THRSW to enable multi-threaded shaders.Eric Anholt2018-01-121-40/+56
* broadcom/vc5: Properly schedule the thread-end THRSW.Eric Anholt2018-01-121-33/+137
* broadcom/vc5: Implement GFXH-1684 workaround.Eric Anholt2018-01-121-0/+4
* broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.Eric Anholt2018-01-121-3/+3
* broadcom/vc5: Add support for V3Dv4 signal bits.Eric Anholt2018-01-121-9/+32
* broadcom/vc5: Fix scheduling for a non-SFU R4 write after a dead R4 write.Eric Anholt2017-11-071-3/+5
* broadcom/vc5: Don't pair VPMSETUP with other peripheral access.Eric Anholt2017-10-121-0/+3
* broadcom: Add VC5 NIR compiler.Eric Anholt2017-10-101-0/+1362
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