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* aco: fix p_extract_vector optimization in presence of unequally sized vector ...Daniel Schürmann2020-04-131-22/+27
* aco: fix nir_op_pack_32_2x16_split if one operand is a constantSamuel Pitoiset2020-04-131-0/+2
* aco: implement 16-bit nir_op_f2i64/nir_op_f2u64Samuel Pitoiset2020-04-131-4/+10
* aco: fix f2i64/f2u64 with sgprs if the exponent computation overflowSamuel Pitoiset2020-04-131-5/+5
* aco: make some reg_file helpers private and fix their usesDaniel Schürmann2020-04-101-25/+29
* aco: rename aco_lower_bool_phis() -> aco_lower_phis()Daniel Schürmann2020-04-105-7/+7
* aco: lower subdword phis with SGPR operandsDaniel Schürmann2020-04-101-0/+26
* aco: don't constant-propagate into subdword PSEUDO instructionsDaniel Schürmann2020-04-101-6/+8
* aco: ensure correct bit representation of subdword constantsDaniel Schürmann2020-04-101-0/+6
* aco: setup subdword regclasses for ssa_undef & load_constDaniel Schürmann2020-04-101-12/+8
* aco: implement nir_op_b2f16/nir_op_i2f16/nir_op_u2f16Samuel Pitoiset2020-04-102-0/+33
* aco: implement 16-bit comparisonsSamuel Pitoiset2020-04-101-13/+31
* aco: implement 16-bit nir_op_fmax3/nir_op_fmin3/nir_op_fmed3Samuel Pitoiset2020-04-101-5/+16
* aco: implement 16-bit nir_op_ldexpSamuel Pitoiset2020-04-101-8/+10
* aco: implement 16-bit nir_op_f2i32/nir_op_f2u32Samuel Pitoiset2020-04-101-2/+18
* aco: implement 16-bit nir_op_bcselSamuel Pitoiset2020-04-101-2/+8
* aco: implement 16-bit nir_op_fsignSamuel Pitoiset2020-04-101-2/+10
* aco: implement 16-bit nir_op_fsatSamuel Pitoiset2020-04-101-2/+6
* aco: implement 16-bit nir_op_fmulSamuel Pitoiset2020-04-101-4/+9
* aco: implement 16-bit nir_op_fcos/nir_op_fsinSamuel Pitoiset2020-04-101-4/+9
* aco: implement 16-bit nir_op_fsub/nir_op_faddSamuel Pitoiset2020-04-101-9/+20
* aco: implement 16-bit nir_op_fabs/nir_op_fnegSamuel Pitoiset2020-04-101-4/+10
* aco: implement 16-bit nir_op_fmax/nir_op_fminSamuel Pitoiset2020-04-101-16/+22
* aco: implement 16-bit nir_op_ffloor/nir_op_fceilSamuel Pitoiset2020-04-101-7/+13
* aco: implement 16-bit nir_op_fsqrt/nir_op_frcp/nir_op_frsqSamuel Pitoiset2020-04-101-9/+21
* aco: implement 16-bit nir_op_ftrunc/nir_op_fround_evenSamuel Pitoiset2020-04-101-7/+13
* aco: implement 16-bit nir_op_fexp2/nir_op_flog2Samuel Pitoiset2020-04-101-3/+11
* aco: implement 16-bit nir_op_ffractSamuel Pitoiset2020-04-101-2/+6
* aco: implement 16-bit nir_op_frexp_sig/nir_op_frexp_expSamuel Pitoiset2020-04-101-11/+15
* aco: RA - move all std::function objects into proper functionsDaniel Schürmann2020-04-091-136/+134
* aco: move all needed helper containers to ra_ctxDaniel Schürmann2020-04-091-56/+58
* aco: change live_out variables to std::unordered_setDaniel Schürmann2020-04-094-8/+17
* aco: change some std::map to std::unordered_map in register_allocationDaniel Schürmann2020-04-091-14/+14
* aco: refactor try_remove_trivial_phi() in RADaniel Schürmann2020-04-092-23/+25
* aco: improve speed of live_var_analysisDaniel Schürmann2020-04-091-53/+20
* aco: during RA only insert into renames table if a variable got renamedDaniel Schürmann2020-04-091-18/+11
* aco: replace assignment hashmap by std::vector in register allocationDaniel Schürmann2020-04-091-74/+92
* aco: improve register assignment when live-range splits are necessaryDaniel Schürmann2020-04-091-3/+5
* aco: improve hashing for value numberingDaniel Schürmann2020-04-091-28/+79
* aco: add explicit padding for all Instruction sub-structsDaniel Schürmann2020-04-091-11/+46
* aco: guarantee that Temp fits in 4 bytesDaniel Schürmann2020-04-091-9/+9
* radv: allow TC-compat HTILE with GENERAL outside of render loopsSamuel Pitoiset2020-04-091-1/+16
* radv: only enable TC-compat HTILE for images readable by a shaderSamuel Pitoiset2020-04-091-0/+8
* radv: only expose fp16 control features for chips with double rate fp16Samuel Pitoiset2020-04-091-5/+10
* radv: only expose storageInputOutput16 for chips with double rate fp16Samuel Pitoiset2020-04-091-2/+2
* radv: only expose shaderFloat16 for chips with double rate fp16Samuel Pitoiset2020-04-092-3/+3
* ac,radv: add ac_gpu_info::has_double_rate_fp16Samuel Pitoiset2020-04-093-2/+6
* radv: Use correct buffer count with variable descriptor set sizes.Bas Nieuwenhuizen2020-04-083-1/+3
* radv: Whitespace fixup.Bas Nieuwenhuizen2020-04-081-1/+0
* radv: set sparseAddressSpaceSize to RADV_MAX_MEMORY_ALLOCATION_SIZESamuel Iglesias Gonsálvez2020-04-081-1/+1
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