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* docs: add shader image extensions for llvmpipeDave Airlie2019-08-271-4/+4
| | | | | | v1.1: fix typo in llvmpipe name (ajax) Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: enable ARB_shader_image_load_storeDave Airlie2019-08-271-1/+2
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: flush on api memorybarrier.Dave Airlie2019-08-271-0/+9
| | | | | | Until we have somewhere we can do better, just hit it with a hammer. Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add memory barrier supportDave Airlie2019-08-271-0/+11
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add support for fences api on older llvmDave Airlie2019-08-272-0/+16
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: bind vertex/geometry shader imagesDave Airlie2019-08-273-0/+126
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: add fragment shader image supportDave Airlie2019-08-2711-8/+334
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* draw: add vs/gs images supportDave Airlie2019-08-278-7/+316
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add image load/store/atomic supportDave Airlie2019-08-277-10/+684
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm/tgsi: add image interface to tgsi builderDave Airlie2019-08-272-1/+20
| | | | | | | This adds the callbacks for the driver/gallium binding for image operations. Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: introduce image jit type to fragment shader jit.Dave Airlie2019-08-272-2/+67
| | | | | | This adds the image type to the fragment shader jit context Reviewed-by: Roland Scheidegger <[email protected]>
* draw: add jit image type for vs/gs images.Dave Airlie2019-08-272-19/+109
| | | | | | | This introduces the jit image type into the jit interface for vertex/geom shaders Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: move the fragment shader variant key to dynamic length.Dave Airlie2019-08-272-22/+46
| | | | | | | | | | This mirrors the vs/gs keys, and will be needed when adding images support. The const changes also mirror how the draw code work (as is needed when we add images) Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add a basic image limitDave Airlie2019-08-271-0/+2
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: handle early test property.Dave Airlie2019-08-271-2/+6
| | | | | | Also handle setting late for shaders that use stores Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: move first/last level jit texture members.Dave Airlie2019-08-274-20/+20
| | | | | | | This lets us create an image structure with the same basic types as the texture one. Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: handle helper invocation (v2)Dave Airlie2019-08-271-0/+5
| | | | | | | | Just invert the exec_mask to get if this is a helper or not. v2: get the bld mask (Roland) Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: make lp_build_float_to_r11g11b10 take a const srcDave Airlie2019-08-272-2/+2
| | | | | | This allows using it with a const src later. Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: refactor jit type creationDave Airlie2019-08-271-76/+87
| | | | | | | This just cleans the code up so the texture/sampler type creation can be reused. Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: fix atomic compare-and-swapDave Airlie2019-08-271-0/+2
| | | | | | | | Not sure how I missed this before, but compswap was hitting an assert here as it is it's own special case. Fixes: b5ac381d8f ("gallivm: add buffer operations to the tgsi->llvm conversion.") Reviewed-by: Roland Scheidegger <[email protected]>
* intel/fs: grab fail_msg from v32 instead of v16 when v32->run_cs failsPaulo Zanoni2019-08-261-1/+1
| | | | | | | | | | | | | | | | | Looks like a copy/paste error. This patch prevents a segfault when running the following on BDW: INTEL_DEBUG=no8,no16,do32 ./deqp-vk -n \ dEQP-VK.subgroups.arithmetic.compute.subgroupmin_dvec4 For the curious, the message we're getting is: CS compile failed: Failure to register allocate. Reduce number of live scalar values to avoid this. Fixes: 864737ce6cd5 ("i965/fs: Build 32-wide compute shader when needed.") Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]>
* pan/midgard: Fix invert fusing with r26Alyssa Rosenzweig2019-08-262-2/+19
| | | | | | The invert wasn't applying (correctly) due to the issues addressed here. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Fold ssa_args into midgard_instructionAlyssa Rosenzweig2019-08-2616-249/+210
| | | | | | This is just a bit of refactoring to simplify MIR. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* gallium: Add the ASTC 3D formats.Eric Anholt2019-08-263-0/+125
| | | | | | | No driver implements them yet, but this is a long way toward gallium having matching format enums for Mesa formats. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add block depth to the format utils.Eric Anholt2019-08-262-1/+26
| | | | | | | I decided not to update nblocks() with a depth arg as the callers wouldn't be doing ASTC 3D. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add a block depth field to the u_formats table.Eric Anholt2019-08-262-356/+357
| | | | | | | | To add ASTC 3D compression formats, we need to be able to express the block depth. While I'm touching every line, line up the columns of the CSV again as they've drifted over time. Reviewed-by: Marek Olšák <[email protected]>
* pan/midgard: Add imov->fmov optimizationAlyssa Rosenzweig2019-08-264-0/+85
| | | | | | | | | | | | | | | | | | When moving constants, if switching to a floating-point representation doesn't break anything, we'd rather have an fmov than an imov, permitting inlining the constant in many circumstances. total quadwords in shared programs: 3408 -> 3366 (-1.23%) quadwords in affected programs: 1188 -> 1146 (-3.54%) helped: 41 HURT: 0 helped stats (abs) min: 1 max: 2 x̄: 1.02 x̃: 1 helped stats (rel) min: 0.19% max: 25.00% x̄: 9.65% x̃: 11.11% 95% mean confidence interval for quadwords value: -1.07 -0.98 95% mean confidence interval for quadwords %-change: -11.38% -7.93% Quadwords are helped. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Switch constants to uint32Alyssa Rosenzweig2019-08-263-10/+17
| | | | | | | | Storing constants as float doesn't make sense when we have integer instructions; better to switch to be integer natively and coerce to/from float rather than the opposite. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* isl: Don't set UnormPathInColorPipe for integer surfaces.Kenneth Graunke2019-08-261-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes dEQP-GLES3.functional.texture.specification subtests on iris: - texsubimage3d_depth.depth24_stencil8_2d_array - texsubimage3d_depth.depth32f_stencil8_2d_array - texsubimage3d_depth.depth_component32f_2d_array - texsubimage3d_depth.depth_component24_2d_array - texstorage2d.format.depth24_stencil8_2d - texstorage2d.format.depth32f_stencil8_2d - texstorage2d.format.depth_component24_2d - texstorage2d.format.depth_component32f_2d - texstorage3d.format.depth24_stencil8_2d_array - texstorage3d.format.depth32f_stencil8_2d_array - texstorage3d.format.depth_component24_2d_array - texstorage3d.format.depth_component32f_2d_array Here, something appears to be going wrong with having this bit set during blorp_copy operations for texture upload, which override the format to R8G8B8A8_UINT. AFAICT this bit should have no effect for integer surfaces, as it has to do with blending, and integer blending is not a thing. So it should be harmless to disable it. The Windows driver appears to be setting this bit universally, so I am unclear why we would need to. Perhaps they simply haven't run into this issue. Fixes: f741de236b5 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by: Jason Ekstrand <[email protected]>
* isl: Drop UnormPathInColorPipe for buffer surfaces.Kenneth Graunke2019-08-261-4/+0
| | | | | | | | Jason suggested I remove this in review, and he's right. AFAICT this affects blending, and that just isn't going to happen on buffers. Fixes: f741de236b5 ("isl: Enable Unorm Path in Color Pipe") Reviewed-by: Jason Ekstrand <[email protected]>
* pan/midgard, bifrost: Set lower_fdph = trueAlyssa Rosenzweig2019-08-262-0/+2
| | | | | | fdph instructions show up in some desktop GL shaders. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* radv: add mipmap support for the clear depth/stencil valuesSamuel Pitoiset2019-08-262-27/+59
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add mipmap support for the TC-compat zrange bugSamuel Pitoiset2019-08-263-24/+51
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allocate metadata space for mipmapped depth/stencil imagesSamuel Pitoiset2019-08-261-2/+2
| | | | | | | | For each mipmaps, the driver will store the clear values (8-bytes) and the TC-compat zrange value (4-bytes). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: decompress mipmapped depth/stencil images during transitionsSamuel Pitoiset2019-08-263-12/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add mipmaps support for decompress/resummarizeSamuel Pitoiset2019-08-261-25/+32
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_process_depth_image_layer() helperSamuel Pitoiset2019-08-261-63/+75
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Remove gfx9_stride_size_workaround_for_atomicConnor Abbott2019-08-263-11/+1
| | | | | | | | | The workaround was entirely in common code, and it's needed in radeonsi too so just always do it when necessary. Fixes KHR-GL45.shader_image_load_store.advanced-allStages-oneImage on gfx9 with LLVM 8. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: add a workaround for viewing a slice of 3D as a 2D imageConnor Abbott2019-08-261-3/+32
| | | | | | | | | | | | GL and Vulkan allow you to bind a single layer of a 3D texture to a 2D image, and we weren't implementing a workaround for that on gfx9 that TGSI was. Copy it over. Fixes KHR-GL45.shader_image_load_store.non-layered_binding with radeonsi NIR. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix getting the index type size for uint8_tSamuel Pitoiset2019-08-261-1/+1
| | | | | | | | | | 16-bit and 32-bit values match hardware values but 8-bit doesn't. This fixes dEQP-VK.pipeline.input_assembly.* with 8-bit index. Fixes: 372c3dcfdb8 ("radv: implement VK_EXT_index_type_uint8") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-08-268-18/+305
| | | | | | | | | | | | | | | | | | The virgl formats are fixed in time snapshots of the gallium ones, we just need to provide a translation table between them when we enter the hardware. This fixes a regression since Eric renumbered the gallium table. Fixes: c45c33a5a2 (gallium: Remove manual defining of PIPE_FORMAT enum values.) Bugzilla: https://bugs.freedesktop.org/111454 v1 by Dave Airlie <[email protected]> v2: virgl: Add a number of formats to the table that are used, e.g. for vertex attributes v3: cover some more missing formats from a piglit run Signed-off-by: Gert Wollny <[email protected]>
* virgl: drop unused format fieldDave Airlie2019-08-262-2/+0
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* lima/ppir: enable vectorize optimizationErico Nunes2019-08-251-0/+5
| | | | | | | | | | pp has vector units and some operations can be optimized when bundled together. Benchmarking this with piglit shaders shows that the instruction count can be greatly reduced on many examples with vectorize. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: lower selects to scalarsErico Nunes2019-08-251-0/+5
| | | | | | | | | nir vec4 fcsel assumes that each component of the condition will be used to select the same component from the options, but pp can't implement that since it only has 1 component for the condition. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima: fix ppir spill stack allocationErico Nunes2019-08-254-9/+25
| | | | | | | | | | | | The previous spill stack was fixed and too small, and caused instability in programs requiring spilling for roughly more than one value. This patch adds a dynamic calculation of the buffer size based on stack utilization and switches it to a separate allocation at flush time that will fit the shader that requires the largest buffer. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* intel/fs: Drop the gl_program from fs_visitorJason Ekstrand2019-08-2515-31/+17
| | | | | | | | | It's not used by anything anymore now that so much lowering has been moved into NIR. Sadly, we still need on in brw_compile_gs() for geometry shaders on Sandy Bridge. Short of a lot of pointless work, that one's probably not going away. Reviewed-by: Kenneth Graunke <[email protected]>
* lima: move format handling to unified placeQiang Yu2019-08-258-103/+190
| | | | | | | | | Create a unified table to handle pipe format to texture and render target format lookup. Reviewed-by: Vasily Khoruzhick <[email protected]> Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* radv: Change memory type order for GPUs without dedicated VRAMAlex Smith2019-08-241-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | Put the uncached GTT type at a higher index than the visible VRAM type, rather than having GTT first. When we don't have dedicated VRAM, we don't have a non-visible VRAM type, and the property flags for GTT and visible VRAM are identical. According to the spec, for types with identical flags, we should give the one with better performance a lower index. Previously, apps which follow the spec guidance for choosing a memory type would have picked the GTT type in preference to visible VRAM (all Feral games will do this), and end up with lower performance. On a Ryzen 5 2500U laptop (Raven Ridge), this improves average FPS in the Rise of the Tomb Raider benchmark by up to ~30%. Tested a couple of other (Feral) games and saw similar improvement on those as well. Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: 19.2 <[email protected]> (Bas: CCing this to 19.2-rc due to high impact and limited complexity)
* lima/ppir: print register index and components number for spilled registerVasily Khoruzhick2019-08-241-1/+3
| | | | | | | | | It can be useful for debugging purposes Tested-by: Andreas Baierl <[email protected]> Reviewed-by: Qiang Yu <[email protected]> Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* lima/ppir: add control flow supportVasily Khoruzhick2019-08-246-23/+168
| | | | | | | | | | This commit adds support for nir_jump_instr, if and loop nir_cf_nodes. Tested-by: Andreas Baierl <[email protected]> Reviewed-by: Qiang Yu <[email protected]> Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
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