aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.Kenneth Graunke2016-07-1737-131/+131
| | | | | | | | | | | | | | | | | Likewise, rename the enum type to glsl_interp_mode. Beyond the GLSL front-end, talking about "interpolation modes" seems more natural than "interpolation qualifiers" - in the IR, we're removed from how exactly the source language specifies how to interpolate an input. Also, SPIR-V calls these "decorations" rather than "qualifiers". Generated by: $ find . -regextype egrep -regex '.*\.(c|cpp|h)' -type f -exec sed -i \ -e 's/INTERP_QUALIFIER_/INTERP_MODE_/g' \ -e 's/glsl_interp_qualifier/glsl_interp_mode/g' {} \; Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Dave Airlie <[email protected]>
* virgl: drop pointless leftover init of virgl_transfer_inline_write.Dave Airlie2016-07-171-1/+0
| | | | | | Pointed out by Marek. Signed-off-by: Dave Airlie <[email protected]>
* nv50: fix alphatest for non-blendable formatsIlia Mirkin2016-07-1614-11/+118
| | | | | | | | | | | | | | | | | | | | The hardware can only do alphatest when using a blendable format. This means that the various *16 norm formats didn't work with alphatest. It appears that Talos Principle uses such formats, as well as alpha tests, for some internal renders, which made them be incorrect. However this does not appear to affect the final renders, but in a different game it easily could. The approach we take is that when alphatests are enabled and a suitable format is used (which we anticipate is the vast minority of the time), we insert code into the shader to perform the comparison and discard. Once inserted, that code lives in the shader forever, and we re-upload it each time the function changes with a fixed-up compare. To avoid re-uploading too often, if we switch back to a blendable format, the test is (effectively) disabled and the hw alphatest functionality is used. Signed-off-by: Ilia Mirkin <[email protected]>
* mesa/st: reduce size of state->st bitmaskRob Clark2016-07-161-1/+1
| | | | | | | | | | | | In d035d50 this changed to 64b.. which I'm pretty sure was unintentional. Revert it back to 32b so the entire state struct is a nice round 64b. (Note sure that it would actually be measurable, but I did notice that check_state() was hot in some benchmarks.) Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/u_queue: add optional cleanup callbackRob Clark2016-07-165-5/+14
| | | | | | | | | | | | Adds a second optional cleanup callback, called after the fence is signaled. This is needed if, for example, the queue has the last reference to the object that embeds the util_queue_fence. In this case we cannot drop the ref in the main callback, since that would result in the fence being destroyed before it is signaled. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove the DRAW_PREAMBLE packetNicolai Hähnle2016-07-163-12/+1
| | | | | | | According to firmware guys, the new sequence that we added for Polaris should work on all CIK parts, and should actually be faster on some parts. Reviewed-by: Marek Olšák <[email protected]>
* mesa: handle numSamples=0 in _mesa_test_proxy_teximage()Brian Paul2016-07-151-3/+1
| | | | | | | Should fix the regressions reported in bug 96949. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96949 Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Use dest.ssa.num_components rather than intrin->num_components.Kenneth Graunke2016-07-151-1/+1
| | | | | | | | | I recently refactored this to share code between load and atomic lowering. loads used intrin->num_components, while atomics used intrin->dest.ssa.num_components. They should be equivalent, but Jason wanted me to use the latter. I missed applying his review. Signed-off-by: Kenneth Graunke <[email protected]>
* nir: Update outdated intrinsic const_index comments.Kenneth Graunke2016-07-151-7/+9
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Use nir_intrinsic_set_base in atomic lowering.Kenneth Graunke2016-07-151-2/+2
| | | | | | | | | | This is more readable and also offers assertions that protect against setting const_index fields on the wrong kind of intrinsic. Suggested by Jason. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Split nir_lower_io's input/output/atomic handling into helpers.Kenneth Graunke2016-07-151-91/+87
| | | | | | | | | | | | | | | The original function was becoming a bit hard to read, with the details of creating and filling out load/store/atomic atomics all in one function. This patch makes helpers for creating each type of intrinsic, and also combines them with the *_op() helpers, as they're closely coupled and not too large. v2: Minor style nits from Jason. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Drop bogus nir_var_shader_in case in nir_lower_io's store_op().Kenneth Graunke2016-07-151-1/+0
| | | | | | | This can't happen, the caller asserts that mode is shader_out or shared. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Share destination rewriting and replacement code in IO lowering.Kenneth Graunke2016-07-151-25/+19
| | | | | | | | Both loads and atomics had identical code to rewrite destinations, and all cases had the same two lines to replace instructions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Share get_io_offset handling in nir_lower_io.Kenneth Graunke2016-07-151-24/+9
| | | | | | | | | | | | The load/store/atomic cases all duplicated the get_io_offset code, with a few tiny differences: stores didn't bother checking for per-vertex inputs, because they can't be stored to, and atomics didn't check at all, since shared variables aren't per-vertex. However, it's harmless to check, and allows us to share more code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Make a 'var' temporary in nir_lower_io.Kenneth Graunke2016-07-151-16/+12
| | | | | | | Less typing and word wrapping issues than intrin->variables[0]->var. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Remove the emit_linterp() helper.Kenneth Graunke2016-07-152-21/+8
| | | | | | | | | | | | | Rather than computing the barycentric mode each time we emit a LINTERP, we can simply compute it once, as soon as we know we're doing non-flat interpolation. At that point, emit_linterp() doesn't do much, so fold it into the call sites and drop it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Reduce the number of fs_reg(brw_reg) calls in LINTERP handling.Kenneth Graunke2016-07-151-4/+4
| | | | | | | | A bit tidier. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Make a barycentric_mode() helper function.Kenneth Graunke2016-07-151-51/+49
| | | | | | | This combines two copies of basically the same code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Rename brw_wm_barycentric_interp_mode to brw_barycentric_mode.Kenneth Graunke2016-07-156-38/+38
| | | | | | | | | | | | | | | | | | | | | | | brw_wm_barycentric_interp_mode is wordy, brw_barycentric_mode is less typing and suffers from fewer line wrapping problems. The enum values themselves don't really benefit from "WM" in the name, either. Put "BARYCENTRIC" first instead of at the end and drop "WM". Generated by: for file in *.c *.cpp *.h; do sed -i \ -e 's/brw_wm_barycentric_interp_mode/brw_barycentric_mode/g' \ -e 's/BRW_WM_\([A-Z_]*\)_BARYCENTRIC/BRW_BARYCENTRIC_\1/g' \ -e 's/BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT/BRW_BARYCENTRIC_MODE_COUNT/g' \ $file; done with a few whitespace changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Handle default interpolation modes and locations in NIR.Kenneth Graunke2016-07-151-45/+56
| | | | | | | | | | | | | This consolidates a bunch of hacks in a single place - by setting the interpolation modes and locations on variables appropriately, we can simply trust them in the rest of the code. This avoids having to handle INTERP_QUALIFIER_NONE, gl_Color overrides, sample-shading overrides, and Gen4-5 centroid-overrides in a bunch of places. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/context: Remove some unnecessary vfuncsJason Ekstrand2016-07-154-21/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Get rid of gen6_surface_state.cJason Ekstrand2016-07-153-49/+7
| | | | | | | | | The only useful thing left was gen6_init_vtable_surface_functions which we can easily put in brw_wm_surface_state.c. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Use ISL for emitting buffer surface statesJason Ekstrand2016-07-157-148/+55
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/state: Account for the element size in emit_buffer_surface_stateJason Ekstrand2016-07-153-13/+16
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/gen4-6: Use the generic ISL-based path for texture surfacesJason Ekstrand2016-07-151-93/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen6: Use the generic ISL-based path for renderbuffer surfacesJason Ekstrand2016-07-151-99/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen7: Use the generic ISL-based path for renderbuffer surfacesJason Ekstrand2016-07-152-200/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen7: Use the generic ISL-based path for texture surfacesJason Ekstrand2016-07-151-167/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen8: Use the generic ISL-based path for renderbuffer surfacesJason Ekstrand2016-07-152-263/+2
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen8: Use the generic ISL-based path for texture surfacesJason Ekstrand2016-07-151-213/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/state: Add generic surface update functions based on ISLJason Ekstrand2016-07-152-0/+194
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/surface_state: Rename brw_update to gen4_updateJason Ekstrand2016-07-151-11/+11
| | | | | | | | | We're about to add generic versions which work across gens and those should have the brw name. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/state: Use ISL for emitting image surfacesJason Ekstrand2016-07-151-11/+22
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use a generic ISL path for texture surfaces on gen8Jason Ekstrand2016-07-151-9/+38
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/state: Add a helper for emitting a surface state using islJason Ekstrand2016-07-152-0/+88
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use the generic ISL path for texture surfaces on gen6Jason Ekstrand2016-07-151-74/+2
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use the generic ISL path for renderbuffer surfaces on gen6Jason Ekstrand2016-07-151-3/+3
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use the generic ISL path for texture surfaces on gen7Jason Ekstrand2016-07-151-93/+3
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use the generic ISL path for renderbuffer surfaces on gen7Jason Ekstrand2016-07-151-4/+4
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Use the generic ISL path for renderbuffer surfaces on gen8-9Jason Ekstrand2016-07-151-95/+4
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/blorp: Add a generic ISL-based surface state emit pathJason Ekstrand2016-07-152-0/+163
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a helper for getting the aux isl_surf from a miptreeJason Ekstrand2016-07-152-0/+122
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a helper for getting the ISL clear color from a miptreeJason Ekstrand2016-07-152-0/+30
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a helper for getting an isl_surf from a miptreeJason Ekstrand2016-07-152-2/+176
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Add an isl_device to the brw_contextJason Ekstrand2016-07-152-0/+6
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl/state: Add support for OffsetX/Y in surface stateJason Ekstrand2016-07-152-0/+31
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for filling out surface states all the way back to gen4Jason Ekstrand2016-07-156-5/+182
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add an ISL_DEV_IS_G4X macroJason Ekstrand2016-07-151-0/+4
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* genxml: Add macros and #includes for gens 4-6Jason Ekstrand2016-07-152-2/+23
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* genxml: Make X/Y Offset field of SURFACE_STATE a uintJason Ekstrand2016-07-157-14/+14
| | | | | | | | | | | THe offset type has special implications that it's intended to be some form of aligned memory address. These assumptions allow it to handle the case where there is some alignment requirement on the offset and the bottom bits are used for other things. However, the offsets in the surface state field are really just unsigned integers. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>