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* i965: Implement HiZ resolves on Broadwell.Kenneth Graunke2014-02-193-2/+113
| | | | | | | | | | | | | | | | | | | | | | | Broadwell's 3DSTATE_WM_HZ_OP packet makes this much easier. Instead of programming the whole pipeline, we simply have to emit the depth/stencil packets, a state override, and a pipe control. Then arrange for the state to be put back. This is easily done from a single function. v2: Use minify(mt->logical_{width,height}0, level) in 3DSTATE_WM_HZ_OP instead of intel_mipmap_level's width/height fields. Those were based on the physical width/height, and thus wrong for MSAA buffers. Eric also deleted those fields. v3: Use 0xFFFF as the sample mask regardless of what the user set (as this operation is unrelated); set the drawing rectangle to the miplevel being operated on, rather than the whole surface; remove unnecessary MAX2(..., 1) around mt->logical_depth0 (all suggested by Eric Anholt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Refactor Gen8 depth packet emission.Kenneth Graunke2014-02-191-72/+99
| | | | | | | | | | | | | | | | | The existing code followed the vtable function signature, which is not a great fit: many of the parameters are unused, and the function still inspects global state, making it less reusable. This patch refactors the depth buffer packet emission code into a new function which takes exactly the parameters it needs, and which uses no global state. It then makes the existing vtable function call the new one. Ideally, we would remove the vtable function, and clean up that interface. But that can happen once HiZ is working. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add #defines for the 3DSTATE_WM_HZ_OP packet's contents.Kenneth Graunke2014-02-191-0/+25
| | | | | | | We're going to need these to implement HiZ. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Bump generation check in code to disable HiZ at LODs > 0.Kenneth Graunke2014-02-191-1/+1
| | | | | | | | | Broadwell's "HiZ Resolve" operation still has the restriction that the rectangle primitive must be 8x4 aligned. So I believe we still need this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Program 3DSTATE_HIER_DEPTH_BUFFER properly on Broadwell.Kenneth Graunke2014-02-191-8/+17
| | | | | | | HiZ buffers still don't exist, but when they do, we'll set them up. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Pull format conversion logic out of brw_depthbuffer_format.Kenneth Graunke2014-02-193-32/+43
| | | | | | | | | | | | brw_depthbuffer_format is not very reusable at the moment, since it uses global state (ctx->DrawBuffer) to access a particular depth buffer. For HiZ on Broadwell, I need a function which simply converts the formats. However, at least one existing user of brw_depthbuffer_format really wants the existing interface. So, I've created a new function. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* egl: clarify what _eglInitResource doesChia-I Wu2014-02-191-1/+5
| | | | It is a helper called from the initializers of its subclasses.
* Revert "egl: Unhide functionality in _eglInitContext()"Chia-I Wu2014-02-191-2/+1
| | | | | | | This reverts commit 1456ed85f0ed8b9c9f0abd6bd389a089fa3824b2. _eglInitResource can and is supposed to be called on subclass objects. Acked-by: Juha-Pekka Heikkila <[email protected]>
* Revert "egl: Unhide functionality in _eglInitSurface()"Chia-I Wu2014-02-191-3/+1
| | | | | | | This reverts commit 498d10e230663f8604d00608cae6324f779c9cdd. _eglInitResource can and is supposed to be called on subclass objects. Acked-by: Juha-Pekka Heikkila <[email protected]>
* i965: Bump MaxTexMbytes from 1GB to 1.5GB.Kenneth Graunke2014-02-181-0/+1
| | | | | | | | | | | | | | | | | Even with the other limits raised, TestProxyTexImage would still reject textures > 1GB in size. This is an artificial limit; nothing prevents us from having a larger texture. I stayed shy of 2GB to avoid the larger-than-aperture situation. For 3D textures, this raises the effective limit: - RGBA8: 645 -> 738 - RGBA16: 512 -> 586 - RGBA32F: 406 -> 465 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Bump GL_MAX_CUBE_MAP_TEXTURE_SIZE to 8192.Kenneth Graunke2014-02-181-1/+1
| | | | | | | | | | | | | | Gen4+ supports 8192x8192 cube maps. Ivybridge and later can actually support 16384, but that would place GL_MAX_CUBE_MAP_TEXTURE_SIZE above GL_MAX_TEXTURE_SIZE, which seems like a bad idea. (Unfortunately, we can't bump GL_MAX_TEXTURE_SIZE to 16384 without causing regressions due to awful W-tiled stencil buffer interactions.) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Bump MAX_3D_TEXTURE_SIZE to 2048.Kenneth Graunke2014-02-181-1/+1
| | | | | | | | | | | | It's highly unlikely that there will be enough memory in the system to allocate enough space for this, but we should still expose the hardware limit. It's what the Intel Windows driver does, and it seems most other vendors do likewise. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* docs: Trivial updates to MESA_query_renderer.specIan Romanick2014-02-181-2/+2
| | | | | | | Fix the version and the status before sending to Khronos for listing in the registry. Signed-off-by: Ian Romanick <[email protected]>
* Prevent zero sized wl_egl_windowSinclair Yeh2014-02-181-0/+6
| | | | | It is illegal to create or resize a window to zero (or negative) width and/or height. This patch prevents such a request from happening.
* glsl: Fix condition to generate shader link errorAnuj Phogat2014-02-181-4/+5
| | | | | | | | | | | | | | | | | | | GL_ARB_ES2_compatibility doesn't say anything about shader linking when one of the shaders (vertex or fragment shader) is absent. So, the extension shouldn't change the behavior specified in GLSL specification. Tested the behavior on proprietary linux drivers of NVIDIA and AMD. Both of them allow linking a version 100 shader program in OpenGL context, when one of the shaders is absent. Makes following Khronos CTS tests to pass: successfulcompilevert_linkprogram.test successfulcompilefrag_linkprogram.test Cc: [email protected] Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Add GL_TEXTURE_CUBE_MAP_ARRAY to legal_get_tex_level_parameter_target()Anuj Phogat2014-02-181-0/+3
| | | | | | | | Fixes failing Khronos CTS test packed_depth_stencil_init.test Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Use conditional sends to do FB writes on HSW+.Eric Anholt2014-02-184-18/+46
| | | | | | | | | | | | | | | | | | | | | | | | | This drops the MOVs for header setup, which are totally mis-scheduled. total instructions in shared programs: 1590047 -> 1589331 (-0.05%) instructions in affected programs: 43729 -> 43013 (-1.64%) GAINED: 0 LOST: 0 glb27-trex: x before + after +-----------------------------------------------------------------------------+ | + x xx + + + | | ++ + xxx ++x xx + ** *x+ + + + x * | |+x xx x* x+++xx*x*xx+++*+*xx++** *x* x+***x*+xx+* + * + + *| | |__|__________MA___A___________|___| | +-----------------------------------------------------------------------------+ N Min Max Median Avg Stddev x 49 62.33 65.41 63.49 63.53449 0.62757822 + 50 62.28 65.4 63.7 63.6982 0.656564 No difference proven at 95.0% confidence Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Drop dead comment about the old proj_attrib_mask optimization.Eric Anholt2014-02-181-6/+0
| | | | | | The code was removed early last year. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Drop mt->levels[].width/height.Eric Anholt2014-02-187-42/+23
| | | | | | | | | | | | It often confused people because it was unclear on whether it was the physical or logical, and people needed the other one as well. We can recompute it trivially using the minify() macro, clarifying which value is being used and making getting the other value obvious. v2: Fix a pasteo in intel_blit.c's dst flip. Reviewed-by: Chris Forbes <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move singlesample_mt to the renderbuffer.Eric Anholt2014-02-188-276/+168
| | | | | | | | | | | Since only window system renderbuffers can have a singlesample_mt, this lets us drop a bunch of sanity checking to make sure that we're just a renderbuffer-like thing. v2: Fix a badly-written comment (thanks Kenneth!), drop the now trivial helper function for set_needs_downsample. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Drop some duplicated code in DRI winsys BO updates.Eric Anholt2014-02-183-110/+38
| | | | | | | | | | | The only DRI2 vs DRI3 delta was just how to decide about frontbuffer-ness for doing the upsample. v2: Fix missing singlesample_mt->region->name update in the merged code, which would have broken the DRI2 don't-recreate-the-miptree optimization. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Simplify intel_miptree_updownsample.Eric Anholt2014-02-181-24/+11
| | | | | | | | | Pretty silly to pass in values dereferenced out of one of the arguments. v2: Get the destination size from the dst, even though the callers are always dealing with src size == dst size cases. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't try to use the ctx->ReadBuffer when asked to blorp miptrees.Eric Anholt2014-02-181-3/+4
| | | | | | | | So far it's happened to be that we're only ever calling intel_miptree_blit() (up/downsampling) from the ReadBuffer, but I stumbled over a null ReadBuffer case when debugging later parts of the series. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make the mt->target of multisample renderbuffers be 2D_MS.Eric Anholt2014-02-181-3/+5
| | | | | | | | | Mostly mt->target == 2D_MS just results in a few checks that we don't try to allocate multiple LODs and don't try to do slice copies with them. But with the introduction of binding renderbuffers to textures, we need more consistency. Reviewed-by: Kenneth Graunke <[email protected]>
* meta: Push into desktop GL mode when doing meta operations.Eric Anholt2014-02-182-23/+19
| | | | | | | | This lets us simplify our shaders, and rely on GLES-prohibited functionality (like ARB_texture_multisample) when writing these driver-internal functions. Reviewed-by: Kenneth Graunke <[email protected]>
* meta: Fix blit shader compile on non-glsl-130 drivers.Eric Anholt2014-02-181-1/+1
| | | | | | | | | | Compare this VS to the one for the post-130 case. Fixes piglit glsl-lod-bias, and presumably tons of other code (I haven't done a full piglit run on swrast). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74911 Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* configure: fix build error with XARob Clark2014-02-181-0/+1
| | | | | | | | | | | | | Fixes: xa_tracker.c: In function 'xa_tracker_create': xa_tracker.c:147:5: error: implicit declaration of function 'pipe_loader_drm_probe_fd' [-Werror=implicit-function-declaration] in some build configurations, as XA now implicitly depends on gallium_drm_loader. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* r600g,radeonsi: Consolidate logic for short-circuiting flushesMichel Dänzer2014-02-186-6/+8
| | | | | | | | | | | | | | | Fixes radeonsi emitting command streams to the kernel even when there have been no draw calls before a flush, potentially powering up the GPU needlessly. Incidentally, this also cuts the runtime of piglit gpu.py in about half on my Kaveri system, probably because an X11 client going away no longer always results in a command stream being submitted to the kernel via glamor. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65761 Cc: "10.1" [email protected] Reviewed-by: Marek Olšák <[email protected]>
* st/dri: remove #ifdef DRM_CAP_PRIME guardEmil Velikov2014-02-181-2/+0
| | | | | | | | Required for libdrm 2.4.37 and earlier. Both scons and automake require version 2.4.38 now so that guard is not longer needed. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* automake: remove leftover XORG and LIBKMS variablesEmil Velikov2014-02-182-3/+0
| | | | | | | No longer set or used since the removal of st/xorg. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* scons: sync package requirementsEmil Velikov2014-02-181-5/+3
| | | | | | | | xorg-server and libkms is no longer required since the removal of the xorg state-tracker. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: bump up libdrm requirement to 2.4.38Emil Velikov2014-02-181-1/+1
| | | | | | | | This is the first version that introduced DRM_CAP_PRIME, which is implicitly required by egl/wayland. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: use test -n whenever possibleEmil Velikov2014-02-181-8/+8
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: use test -z whenever possibleEmil Velikov2014-02-181-7/+7
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: cleanup classic dri drivers handlingEmil Velikov2014-02-181-63/+59
| | | | | | | | | | | | | | * Make sure that only drivers that are handled by configure.ac are included in DRI_DIRS. * Change with_dri_drivers default value to auto, and set enable autodetection, when enable_opengl is on. v2: Move "test" to the correct location. v3: Squash DRI_DIRS handling before the switch statement. Suggested by Ilia Mirkin Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: compact ppc/sparc DRI_DIRS handlingEmil Velikov2014-02-181-8/+2
| | | | | | | Both arches have the same list of dri_dirs. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: drop explicit DRI_DIRS assignment on some platforms/archesEmil Velikov2014-02-181-11/+2
| | | | | | | | | | | | | | Both x86_64|amd64 and *bsd, already set the full range of available classic dri drivers. Drop the explicit assignment, and fall back to the generic default. Keep explicit list from plafroms/arches that do not handle the default list. Update help strings, to explicitly mention "classic" for applicable DRI drivers. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* configure: cleanup switch statementEmil Velikov2014-02-171-35/+12
| | | | | | | | Move all the cases within one switch statement and handle i9{1,6}5 and r{adeon,200} independently. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* targets/vdpau: Don't link unused librariesKusanagi Kouichi2014-02-175-5/+7
| | | | | | libvdpau, libselinux and libexpat are not used. Signed-off-by: Kusanagi Kouichi <[email protected]>
* configure: Try pkg-config first for libselinuxKusanagi Kouichi2014-02-174-5/+10
| | | | | | | | v2 (Emil) Add SELINUX_CFLAGS in the respective locations Signed-off-by: Kusanagi Kouichi <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]> (v1)
* targets/vdpau: Always use c++ to linkKusanagi Kouichi2014-02-171-5/+1
| | | | | | | | | | | If built without llvm, the following error occurs with mplayer: Failed to open VDPAU backend .../libvdpau_r600.so: undefined symbol: _ZTVN10__cxxabiv117__class_type_infoE [vo/vdpau] Error when calling vdp_device_create_x11: 1 Cc: <[email protected]> Signed-off-by: Kusanagi Kouichi <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/xvmc: fix tests so that they passIlia Mirkin2014-02-163-10/+12
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Christian König <[email protected]>
* pipe-loader: add pipe loader for freedreno/msmRob Clark2014-02-162-0/+38
| | | | Signed-off-by: Rob Clark <[email protected]>
* st/xa: missing handle typeRob Clark2014-02-161-0/+1
| | | | | | | DRM_API_HANDLE_TYPE_SHARED is zero, so doesn't actually fix anything. But we shouldn't rely on SHARED handle type being zero. Signed-off-by: Rob Clark <[email protected]>
* st/xa: use pipe-loader to get screenRob Clark2014-02-168-55/+45
| | | | | | This lets multiple gallium drivers use XA. Signed-off-by: Rob Clark <[email protected]>
* pipe-loader: split out "client" versionRob Clark2014-02-165-12/+37
| | | | | | | | Build two versions of pipe-loader, with only the client version linking in x11 client side dependencies. This will allow the XA state tracker to use pipe-loader. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: use (ss) for WAR hazardsRob Clark2014-02-161-2/+19
| | | | | | | | | | | | | | | Seems texture sample instructions don't immediately consume there src(s). In fact, some shaders from blob compiler seem to indiciate that it does not even count the texture sample instructions when calculating number of delay slots to fill for non-sample instructions. (Although so far it seems inconclusive as to whether this is required.) In particular, when a src register of a previous texture sample instruction is clobbered, the (ss) bit is needed to synchronize with the tex pipeline to ensure it has picked up the previous values before they are overwritten. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix RA typoRob Clark2014-02-162-4/+4
| | | | | | | | | | Was supposed to be a '+', otherwise we end up with a negative offset and choosing registers below the assigned range. This seems to fix the scheduling mystery "solved" by adding in extra delay slots. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: handle kill properly (new compiler)Rob Clark2014-02-164-26/+105
| | | | | | | | | | | | | Since 'kill' does not produce a result, the new compiler was happily optimizing them out. We need to instead track 'kill's similar to outputs. But since there is no non-predicated kill instruction, (and for flattend if/else we do want them to be predicated), we need to track the topmost branch condition on the stack and use that as src arg to the kill. For a kill at the topmost level, we have to generate an immediate 1.0 to feed into the cmps.f for setting the predicate register. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: trans_cmp() sanityRob Clark2014-02-161-51/+35
| | | | | | | | | | | | | | | Thanks to figuring out 32bit float render target, and adding regdump test in fdre-a3xx, I can more easily play around with instructions to figure out range of inputs/outputs/etc. And from this I can conclude that cmps.f works more like expected and I can do something much more simple in trans_cmp() (compared to before which was more closely emulating the instruction sequence of the blob compiler). And using sel.b32 (binary 0/1) often makes more sense than sel.f32 (+/- float) or sel.u32 (+/- uint) as it can use the output directly from cmps.f without needing the 'add.s tmp0, tmp0, -1'. Signed-off-by: Rob Clark <[email protected]>