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* freedreno/ir3: convert to "new style" frag inputsRob Clark2019-03-302-2/+33
* freedreno/ir3: add pass to move varying loadsRob Clark2019-03-305-0/+151
* freedreno/ir3: rework varying packingRob Clark2019-03-301-30/+98
* freedreno/ir3: re-indent commentRob Clark2019-03-301-4/+4
* nir: add lower_all_io_to_elementsRob Clark2019-03-302-0/+2
* nir: print var name for load_interpolated_input tooRob Clark2019-03-301-0/+1
* i965,iris/blorp: do not blit 0-sizesSergii Romantsov2019-03-302-2/+18
* gallium: Fix autotools build with libxatracker.la.Vinson Lee2019-03-291-4/+2
* gallium: fix autotools build of pipe_msm.laTimur Kristóf2019-03-291-4/+2
* nir: Lock around validation fail shader dumpingJason Ekstrand2019-03-291-0/+10
* util: no-op __builtin_types_compatible_p() for non-GCC compilersBrian Paul2019-03-291-0/+4
* iris: Clean up compiler warnings about unusedCaio Marcelo de Oliveira Filho2019-03-292-11/+1
* egl: hide entrypoints that shouldn't be exported when using glvndEric Engestrom2019-03-291-0/+6
* nir/validate: validate that tex deref sources are actually derefsKarol Herbst2019-03-291-0/+11
* nir/print: fix printing the image_array intrinsic indexKarol Herbst2019-03-291-2/+2
* Revert "ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations"Timothy Arceri2019-03-291-42/+24
* ac: fix return type for llvm.amdgcn.frexp.exp.i32.64Samuel Pitoiset2019-03-291-1/+1
* virgl: Add a caps feature check versionGert Wollny2019-03-293-1/+4
* radv: do not always initialize HTILE in compressed stateSamuel Pitoiset2019-03-291-2/+8
* iris: Print the memzone name when allocating BOs with INTEL_DEBUG=bufKenneth Graunke2019-03-281-2/+17
* nir: use {0} initializer instead of {} to fix MSVC buildBrian Paul2019-03-281-2/+2
* intel/compiler: Use partial redundancy elimination for comparesIan Romanick2019-03-281-0/+20
* nir: Add partial redundancy elimination for comparesIan Romanick2019-03-285-0/+414
* nir: Add nir_alu_srcs_negative_equalIan Romanick2019-03-283-0/+192
* nir: Add nir_const_value_negative_equalIan Romanick2019-03-284-0/+398
* nir/algebraic: Add missing 16-bit extract_[iu]8 patternsIan Romanick2019-03-281-0/+3
* nir/algebraic: Add missing 64-bit extract_[iu]8 patternsIan Romanick2019-03-281-0/+3
* nir/algebraic: Remove redundant extract_[iu]8 patternsIan Romanick2019-03-281-14/+4
* nir/algebraic: Fix up extract_[iu]8 after loop unrollingIan Romanick2019-03-281-2/+20
* nir/deref: fix struct wrapper casts. (v3)Dave Airlie2019-03-291-2/+36
* i965/blorp: Remove unused parameter from blorp_surf_for_miptree.Rafael Antognolli2019-03-281-24/+12
* iris/icl: Add WA_2204188704 to disable pixel shader panic dispatchAnuj Phogat2019-03-281-0/+7
* iris/icl: Set Enabled Texel Offset Precision Fix bitAnuj Phogat2019-03-281-0/+7
* freedreno/ir3: align const size to vec4Rob Clark2019-03-281-4/+5
* freedreno/ir3: reads/writes to unrelated arrays are not dependentRob Clark2019-03-281-1/+30
* freedreno/ir3: sched fixRob Clark2019-03-281-1/+1
* freedreno/a6xx: small cleanupRob Clark2019-03-281-2/+2
* iris: Fix blits with S8_UINT destinationKenneth Graunke2019-03-281-4/+2
* st/mesa: Fix blitting from GL_DEPTH_STENCIL to GL_STENCIL_INDEXKenneth Graunke2019-03-281-0/+1
* freedreno/ir3: Add workaround for VS samgqKristian H. Kristensen2019-03-286-4/+29
* freedreno/ir3: Don't access beyond available regsKristian H. Kristensen2019-03-281-4/+7
* util/disk_cache: close fd in the fallback pathEric Engestrom2019-03-281-4/+3
* radv: skip updating depth/color metadata for conditional renderingSamuel Pitoiset2019-03-281-3/+3
* st/nir: Free the GLSL IR after linking.Kenneth Graunke2019-03-281-0/+4
* radv: enable VK_AMD_gpu_shader_int16Samuel Pitoiset2019-03-281-0/+1
* radv: do not lower frexp_exp and frexp_sigSamuel Pitoiset2019-03-281-1/+0
* ac: add ac_build_frex_exp() helper ans 16-bit/32-bit supportSamuel Pitoiset2019-03-283-3/+33
* ac: add ac_build_frexp_mant() helper and 16-bit/32-bit supportSamuel Pitoiset2019-03-283-2/+31
* iris: Actually advertise some modifiersKenneth Graunke2019-03-271-0/+39
* intel/genxml: Media instructions and structures for gen11Toni Lönnberg2019-03-281-24/+3450