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* mesa: Fix depth/stencil ordering in _mesa_format_from_format_and_type().Eric Anholt2019-10-171-1/+1
| | | | | | | | | | The GL spec says the 24-bit component is in the high bits, and format_unpack.c looks at the high 24 bits in the S8Z24 case, not Z24SS8. Avoids a regression in the next commit. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add debug info to _mesa_format_from_format_and_type() error path.Eric Anholt2019-10-171-0/+4
| | | | | | | The unreachable() that follows isn't very useful for debug, and by adding this here we get a nice description of the failure in debug builds. Reviewed-by: Kenneth Graunke <[email protected]>
* freedreno/a6xx: Turn on geometry shadersKristian H. Kristensen2019-10-172-3/+15
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ci: Add failing tests to skip listKristian H. Kristensen2019-10-171-0/+4
| | | | | | Some queries are still failing and layered rending needs more work. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Implement PIPE_QUERY_PRIMITIVES_GENERATED for GSKristian H. Kristensen2019-10-173-0/+68
| | | | | | | When we don't have streamout enabled, we have to read this register to get the number of primitives emitted. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/blitter: Save GS stateKristian H. Kristensen2019-10-171-0/+1
| | | | | | We have GS state now. Signed-off-by: Kristian H. Kristensen <[email protected]>
* st/mesa: Also enable GS when ESSLVersion > 320Kristian H. Kristensen2019-10-171-1/+1
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Support layered render targetsKristian H. Kristensen2019-10-174-4/+32
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Emit program state for GSKristian H. Kristensen2019-10-173-26/+148
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: End VS with CHMASK and CHSH in GS pipelinesKristian H. Kristensen2019-10-171-1/+18
| | | | | | | | | | | When used in a GS pipeline, the VS doesn't end with the END instruction. Instead it chains to the GS, which continues running with the same register allocation. The intended use cases seems to be that you can compile a regular VS (ie outputs in registers and ending with END) but then tack on link-time generated code past the END to write the outputs using STLW, in case the VS is used with GS. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Start GS with (ss) and (sy)Kristian H. Kristensen2019-10-171-0/+13
| | | | | | | We don't know what kind of loads we might have to wait on when coming in from chsh in the VS so set both sync flags. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Pre-color GS header and primitive IDKristian H. Kristensen2019-10-171-0/+9
| | | | | | | | | These sysvals have to be unclobbered by VS and in the same registers in both VS and GS, since the chsh from VS to GS doesn't reload the values. We use the pre-color argument to ir3_ra() to always place these values in r0.x and r0.y. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Setup ir3 inputs and outputs for GSKristian H. Kristensen2019-10-171-3/+64
| | | | | | | | | | | | Inputs are the GS header, which contains vertex ID, local primitive ID and thread ID as well as primitive ID. The setup is a little different from other sysvals, since we always have to receive them in the VS so that it can pass them on into the GS. The vertex flag outputs from GS is set up as a proper nir output in the lowering pass and doesn't need special handling here. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Implement primitive layout intrinsicsKristian H. Kristensen2019-10-178-4/+113
| | | | | | | | This implements the load_vs_primitive_stride_ir3, load_vs_vertex_stride_ir3 and load_primitive_location_ir3 intrinsics, used for getting the primitive layout strides and locations. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Implement lowering passes for VS and GSKristian H. Kristensen2019-10-1713-2/+517
| | | | | | | | This introduces two new lowering passes. One to lower VS to explicit outputs using STLW and one to lower GS to load input using LDLW and implement the GS specific functionality. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Add has_gs flag to shader keyKristian H. Kristensen2019-10-172-5/+11
| | | | | | | Since the presence of GS changes how the VS operates we need to track that in the shader key. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Add missing adjacency primitives to tableKristian H. Kristensen2019-10-171-8/+12
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Add intrinsics that map to LDLW/STLWKristian H. Kristensen2019-10-172-0/+83
| | | | | | | These intrinsics will let us do all the offset calculations in nir, which is nicer to work with and lets nir_opt_algebraic eat it all up. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Add new LDLW/STLW instructionsKristian H. Kristensen2019-10-174-3/+8
| | | | | | These access memory used for passing data between geometry stages. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Extend RA with mechanism for pre-coloring registersKristian H. Kristensen2019-10-173-50/+60
| | | | | | | We'll need to pre-color certain input registers betwee VS and GS shaders. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Use third register for offset for LDL and LDLVKristian H. Kristensen2019-10-174-12/+18
| | | | | | | | Before, offset held the offset, which can be either immediate or a register. Use a third register to hold the offset so that we can use a register. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ir3: Add support for CHSH and CHMASK instructionsKristian H. Kristensen2019-10-172-1/+3
| | | | | | | Just add the constructors for now and special case similar to END so we don't remove them. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Trim a few regs from fd6_emit_restore()Kristian H. Kristensen2019-10-171-20/+0
| | | | | | | We know what these do an either write them in the program stateobj or don't need to write them. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/registers: Update with GS, HS and DS registersKristian H. Kristensen2019-10-176-12/+108
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/ci: Ban texsubimage2d_pbo.r16ui_2d, due to two flakes reported.Eric Anholt2019-10-171-0/+3
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* st/mesa: silence a warning in st_nir_lower_tex_src_planeMarek Olšák2019-10-171-1/+1
| | | | trivial
* gallium/u_blitter: remove an unused variableMarek Olšák2019-10-171-2/+0
| | | | trivial
* radeonsi: recreate aux_context after a GPU resetMarek Olšák2019-10-171-3/+25
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: call the reset callback if get_device_reset_status returns a failureMarek Olšák2019-10-173-20/+7
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* st/mesa: call the reset callback if glGetGraphicsResetStatus returns a failureMarek Olšák2019-10-171-12/+14
| | | | | | so that we immediately set the no-op dispatch Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* intel/fs/gen12: Add tests for scoreboard passCaio Marcelo de Oliveira Filho2019-10-172-1/+864
| | | | | | | | | | | | | Tests the combinations of cases of RAW, WAW and WAR hazards involving both inorder and outoforder instructions. Also tests that dependencies combine and propagate correctly through control flow (loops and conditionals). v2: Add an extra test illustrating that the non-logical CFG edge between then-block and else-block is being taking into account. (Curro) Reviewed-by: Francisco Jerez <[email protected]>
* aco: don't combine minmax3 if there is a neg or abs modifier in betweenDaniel Schürmann2019-10-171-29/+1
| | | | | | | This fixes a graphical corruption in HotS. No pipelinedb changes other than that. Reviewed-by: Rhys Perry <[email protected]>
* gallivm: Fix saturated signed psub/padd intrinsics on llvm 8Roland Scheidegger2019-10-171-18/+10
| | | | | | | | | | | LLVM 8 did remove both the signed and unsigned sse2/avx intrinsics in the end, and provide arch-independent llvm intrinsics instead. Fixes a crash when using snorm framebuffers (tested with piglit arb_color_buffer_float-render GL_RGBA8_SNORM -auto). Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Dave Airlie <[email protected]> CC: <[email protected]>
* radv: fix DCC fast clear code for intensity formats (correctly)Samuel Pitoiset2019-10-171-12/+9
| | | | | | | | | | | | Previous fix was pretty bogus. This fixes a rendering regression with Nier (minimap too large). Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1943 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1952 Fixes: ea92273cea8 ("radv: fix DCC fast clear code for intensity formats") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* panfrost: Keep track of active BOsTomeu Vizoso2019-10-173-21/+87
| | | | | | | | | | | | | | | If two jobs use the same GEM object at the same time, the job that finishes first will (previous to this commit) close the GEM object, even if there's a job still referencing it. To prevent this, have all jobs use the same panfrost_bo for a given GEM object, so it's only closed once the last job is done with it. Signed-off-by: Tomeu Vizoso <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Rohan Garg <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* nv50/ir: remove DUMMY edge typeKarol Herbst2019-10-174-13/+1
| | | | | | | it was never used Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: do not increase ref count of the new throttle fenceJames Xiong2019-10-171-2/+4
| | | | | | | | | | | | | | A new throttle fence was initialized to 1, and increased by 1 again when it's put in drawable->throttle_fence; the ref was decreased by 1 when it's removed from drawable->throttle_fence, and never reached to 0, caused leak. Fixes: ff77bf5cbf7 ("gallium: simplify throttle implementation") Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1949 Signed-off-by: James Xiong <[email protected]> Reported-by: Florian Wesch <[email protected]> Reviewed-by: Jose Maria Casanova Crespo <[email protected]>
* nir: drop unused alpha_ref_floatErik Faye-Lund2019-10-172-2/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: drop support for using load_alpha_ref_floatErik Faye-Lund2019-10-171-14/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* v3d: do not report alpha-test as supportedErik Faye-Lund2019-10-173-11/+3
| | | | | | | This triggers lowering in the state-tracker, which makes things a bit simpler. Reviewed-by: Marek Olšák <[email protected]>
* vc4: do not report alpha-test as supportedErik Faye-Lund2019-10-172-14/+4
| | | | | | | This triggers lowering in the state-tracker, which makes things a bit simpler. Reviewed-by: Marek Olšák <[email protected]>
* panfrost: do not report alpha-test as supportedErik Faye-Lund2019-10-173-20/+3
| | | | | | | This triggers lowering in the state-tracker, which makes things a bit simpler. Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: support lowering user-clip-planes automaticallyErik Faye-Lund2019-10-178-2/+45
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa/program: support referencing the clip-space clip-plane stateErik Faye-Lund2019-10-172-0/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: support feeding state to nir_lower_clip_[vg]sErik Faye-Lund2019-10-177-17/+49
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: support lowering clipdist to arraysErik Faye-Lund2019-10-177-44/+89
| | | | | | | | This allows us to make sure clipdist is emitted as a scalar array rather than two vec4s. This matches SPIR-V semantics, and will be useful for Zink. Reviewed-by: Marek Olšák <[email protected]>
* mesa/gallium: automatically lower two-sided lightingErik Faye-Lund2019-10-179-3/+22
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: support derefs in two-sided lighting loweringErik Faye-Lund2019-10-171-12/+28
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa/gallium: automatically lower point-sizeErik Faye-Lund2019-10-178-1/+26
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: add lowering-pass for point-size movErik Faye-Lund2019-10-174-0/+74
| | | | Reviewed-by: Marek Olšák <[email protected]>