diff options
author | Kristian H. Kristensen <[email protected]> | 2019-10-11 12:34:54 -0700 |
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committer | Kristian H. Kristensen <[email protected]> | 2019-10-17 13:43:53 -0700 |
commit | c347708bea00907de3f290090e7769c72a12a15a (patch) | |
tree | 193940695c0c9c8519eba0a6c56017486309d470 | |
parent | ce08fddbbe5888a5d573edb127c623e7be7d3169 (diff) |
freedreno/ir3: Pre-color GS header and primitive ID
These sysvals have to be unclobbered by VS and in the same registers
in both VS and GS, since the chsh from VS to GS doesn't reload the
values. We use the pre-color argument to ir3_ra() to always place
these values in r0.x and r0.y.
Signed-off-by: Kristian H. Kristensen <[email protected]>
-rw-r--r-- | src/freedreno/ir3/ir3_compiler_nir.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 1d51bb0aaec..1924b0a5493 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -3172,6 +3172,15 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, } ret = ir3_ra(so, ir->inputs, ir->ninputs); + } else if (ctx->gs_header) { + /* We need to have these values in the same registers between VS and GS + * since the VS chains to GS and doesn't get the sysvals redelivered. + */ + + ctx->gs_header->regs[0]->num = 0; + ctx->primitive_id->regs[0]->num = 1; + struct ir3_instruction *precolor[] = { ctx->gs_header, ctx->primitive_id }; + ret = ir3_ra(so, precolor, ARRAY_SIZE(precolor)); } else { ret = ir3_ra(so, NULL, 0); } |