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* gallium: get rid of PIPE_CAP_SM3Erik Faye-Lund2019-07-1021-28/+63
| | | | | | | | | | | | | | | | | | | | | PIPE_CAP_SM3 has always been an odd one out of all our caps. While most other caps are fine-grained and single-purpose, this cap encode several features in one. And since OpenGL cares more about single features, it'd be nice to get rid of this one. As it turns, this is now relatively simple. We only really care about three features using this cap, and those already got their own caps. So we can remove it, and make sure all current drivers just give the same response to all of them. The only place we *really* care about SM3 is in nine, and there we can instead just re-construct the information based on the finer-grained caps. This avoids DX9 semantics from needlessly leaking into all of the drivers, most of who doesn't care a whole lot about DX9 specifically. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]>
* gallium: give vertex-shader saturate its own capErik Faye-Lund2019-07-104-1/+5
| | | | | | | | | | Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support vertex-shader saturate but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: give fragment-shader derivatives its own capErik Faye-Lund2019-07-104-1/+5
| | | | | | | | | | Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support fragment-shader derivatives but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: give fragment-shader texture-lod its own capErik Faye-Lund2019-07-104-1/+7
| | | | | | | | | | Shader Model 3.0 is a big promise to make to the state-tracker, and for instance mobile hardware might support texture lod but not some of the other features of SM3. So let's give this its own cap for simplicity. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: drop needless has_shader_model3 booleanErik Faye-Lund2019-07-102-3/+1
| | | | | | | | | This boolean is only consulted once during init, so there's nothing much saved by storing this in the context. So let's just check directly when we need it instead. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* panfrost: Fix copyright identifier in a few placesAlyssa Rosenzweig2019-07-102-2/+2
| | | | | | | Oops. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost: Bikeshed pan_screen.c commentAlyssa Rosenzweig2019-07-101-25/+21
| | | | | | | The asterisks were inherited from... softpipe, maybe? Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost: Check GPU version before loadingAlyssa Rosenzweig2019-07-103-5/+28
| | | | | | | | | | Panfrost is known to only work on a select few CPU/GPU combinations at the moment (tested system-on-chips: RK3288, RK3399, and S912). Whitelist the combinations known to work and refuse to load on others where nothing works yet to avoid user confusion. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost: Be more honest about PIPE_CAPsAlyssa Rosenzweig2019-07-102-101/+39
| | | | | | | | | | | | | | | A lot of the pan_screen.c code was cargoculted from other drivers. The upshot is that we return true for a lot of PIPE_CAPs that we don't actually support, resulting in us exposing way too many extensions that we don't actually support. Be more careful. Some CAPs we do need to fake to access higher dEQP versions (i.e. in order to debug the features we're hiding behind the CAP). For these, we hide the CAP behind a special PAN_MESA_DEBUG=deqp option to avoid apps randomly using these in-development features. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost/midgard: Hit missed scheduling opportunityAlyssa Rosenzweig2019-07-101-1/+1
| | | | | | | | | | | | | | | | | Don't try to schedule to vmul when that can't possible work (forcing a bundle break). glmark: total bundles in shared programs: 2700 -> 2683 (-0.63%) bundles in affected programs: 695 -> 678 (-2.45%) helped: 14 HURT: 0 helped stats (abs) min: 1 max: 4 x̄: 1.21 x̃: 1 helped stats (rel) min: 1.27% max: 7.69% x̄: 4.30% x̃: 4.77% 95% mean confidence interval for bundles value: -1.68 -0.75 95% mean confidence interval for bundles %-change: -5.63% -2.97% Bundles are helped. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Include shader size for shader-dbAlyssa Rosenzweig2019-07-101-3/+5
| | | | | | | It's easy to forget about, but shader size does matter for things like i-cache, so let's include it in the analysis. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Include loop count for shader-dbAlyssa Rosenzweig2019-07-102-2/+9
| | | | | | | We have to emit it anyway for the report to be happy (with respect to unrolling), so return an actual count rather than dummy numbers. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Dump shader-db statsAlyssa Rosenzweig2019-07-102-0/+40
| | | | | | All the kool kids are doing it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Flush undefineds to zeroAlyssa Rosenzweig2019-07-105-6/+100
| | | | | | Fixes a buggy dEQP test. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Specify channel count for broadcasting opsAlyssa Rosenzweig2019-07-101-8/+8
| | | | | | | bany/ball type ops read from all 4 channels even though they only write to 1; specify this in the opcode table like we do for dot products. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Don't try to "alias" texture registersAlyssa Rosenzweig2019-07-101-5/+0
| | | | | | It won't work. Just, stop it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* radv: compute correct number of input vertices for NGGSamuel Pitoiset2019-07-101-1/+24
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove extra code for exporting LayerID to the next stageSamuel Pitoiset2019-07-101-17/+2
| | | | | | | | Now that the output usage mask is set to 0x1 the LayerID is correctly exported in the loop above. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: set the LayerId output usage mask if FS needs itSamuel Pitoiset2019-07-101-0/+17
| | | | | | | | When the stage preceding FS doesn't export it the fragment shader might read it, even if it's 0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* panfrost: Update supported formatsAlyssa Rosenzweig2019-07-101-40/+10
| | | | | | | | | | | | | | | | | | | | | Much of the format selection code was inherited from softpipe (!) of all places, and a lot of it is accordingly cruft. Later if-elses were added in random places to workaround missing formats at various points in history. Clean up some of this. Theoretically, any format we can texture from we can also render to. In practice, there are a few corner cases that we need to disable explicitly. For one, we do have to restrict SCANOUT formats to workaround buggy apps (in particular, dEQP which with --deqp-surface-type=window under Weston will end up with RGB10_A2 and complain about low alpha precision). Just be clearer about how/why. Also, RGB5_A1 support is still broken; let's not worry about that quite yet. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/mfbd: Cleanup format code selectionAlyssa Rosenzweig2019-07-102-72/+95
| | | | | | | Rather than have random variables flying around and a long if-else chain, use a switch. They're literally *designed* for this. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Cleanup blend switchAlyssa Rosenzweig2019-07-101-18/+31
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/mfbd: Handle PIPE_FORMAT_B10G10R10A2_UNORMAlyssa Rosenzweig2019-07-102-1/+14
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Handle PIPE_FORMAT_B10G10R10A2_UNORMAlyssa Rosenzweig2019-07-101-2/+2
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement ES3-format writeoutAlyssa Rosenzweig2019-07-104-8/+129
| | | | | | | | | | | | We add support for writing out (via a blend shader): - RGBA4 - RGB10_A2_UNORM - RGB10_A2_UINT - RGB5_A1_UNORM - R11G11B10_FLOAT Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Refactor blend infrastructureAlyssa Rosenzweig2019-07-109-202/+455
| | | | | | | We would like to permit keying blend shaders against the framebuffer format, which requires some new blending abstractions. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Use unsigned blend patch offsetAlyssa Rosenzweig2019-07-101-1/+1
| | | | | | | We would like the offset field to be unsigned, letting 0 represent "no offset" and positive represent an offset. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Handle pure int formatsAlyssa Rosenzweig2019-07-101-14/+26
| | | | | | | | | | | | | I'm not sure I'm totally comfortable with this, but conceptually neither float nor pure-int formats require any format conversion, except size conversion. Going from a shaderable format (fp32 or i16, for instance) into a blendable format (fp16) is a separate question, one we can defer momentarily while we're not interested in actually blending. As an aside, I'd be fascinated by an integer-based blending implementation. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/mfbd: Handle pure int formatsAlyssa Rosenzweig2019-07-101-4/+16
| | | | | | | We see that the render target itself turns out to be typeless (surprise!) Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Set rt_count_2 for bpp>4 formatsAlyssa Rosenzweig2019-07-101-0/+7
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Implement preliminary float convertersAlyssa Rosenzweig2019-07-101-7/+33
| | | | | | | We'll need some careful handling, but for now, get some baseline code out for handling float formats in a blend shader. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Skip blend for REPLACE (shader)Alyssa Rosenzweig2019-07-101-0/+23
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Handle "blend disabled" blend shadersAlyssa Rosenzweig2019-07-101-12/+22
| | | | | | | | Normally, disabled blend can definitely be fixed-function'd away, but if a blend shader is used merely for format conversion rather than blending, this code path can be nevertheless hit. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Route format through fixed-function blendingAlyssa Rosenzweig2019-07-103-8/+51
| | | | | | Not all framebuffer formats are supported by the fixed-function blender. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Pipe framebuffer format aroundAlyssa Rosenzweig2019-07-105-7/+21
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Use Gallium framebuffer formatsAlyssa Rosenzweig2019-07-101-4/+37
| | | | | | | | | Ideally, we would keep Galliumisms far away from the compiler; unfortunately, Mesa hasn't standardized on system of format codes to be shared across APIs and across drivers, so using Gallium formats is our best bet in the short run. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Use fp16 exclusively while blendingAlyssa Rosenzweig2019-07-102-9/+9
| | | | | | | | | We now have some preliminary fp16 support available. We're not able to expose this for GLSL quite yet, but for internal blend shaders, we're able to do control bitness ourselves just fine. So let's fp16 that stuff! Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Remove opt_copy_prop_texAlyssa Rosenzweig2019-07-101-50/+0
| | | | | | | | Eventually this should be replaced by proper tex RA / not emitting so many silly moves to begin with / better general copy prop. For now remove it since it breaks things. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Fix scalarificationAlyssa Rosenzweig2019-07-102-5/+25
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Handle fp16 in embedded_to_inline_constantsAlyssa Rosenzweig2019-07-101-1/+8
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Eliminate redundant type convertAlyssa Rosenzweig2019-07-101-0/+3
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Fix fp16 embedded constantsAlyssa Rosenzweig2019-07-101-0/+19
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Hoist mask fieldAlyssa Rosenzweig2019-07-107-80/+70
| | | | | | | | | | Share a single mask field in midgard_instruction with a unified format, rather than using separate masks for each instruction tag with hardware-specific formats. Eliminates quite a bit of duplicated code and will enable vec8/vec16 masks as well (which don't map as cleanly to the hardware as we might like). Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Allow fp16 in scalar ALUAlyssa Rosenzweig2019-07-102-16/+52
| | | | | | The packing is a little different, so implement that. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Implement f2u16 and friendsAlyssa Rosenzweig2019-07-102-1/+6
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Implement f2f16/f2f32Alyssa Rosenzweig2019-07-103-3/+27
| | | | | | These conversions handle half-floats within the shader. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Verify src_bitsize == dst_bitsizeAlyssa Rosenzweig2019-07-101-4/+5
| | | | | | | We can handle differing, but we'd prefer not to because there are restrictions on sizing which aren't accounted for yet. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Simplify blend readAlyssa Rosenzweig2019-07-101-23/+5
| | | | | | | It's not clear where the extra indirection was from (older hardware or just older blobs?) Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: NIRify blend load scale/convertAlyssa Rosenzweig2019-07-102-54/+8
| | | | | | | | The scale and type-convert can now be expressed in NIR, rather than MIR, which is significantly more maintainable and demonstrates correctness of the type conversion patches. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Fix blend constant scheduling bugAlyssa Rosenzweig2019-07-101-0/+4
| | | | | | Blend constant conflicts run in two directions. Signed-off-by: Alyssa Rosenzweig <[email protected]>
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