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-rw-r--r--src/intel/genxml/gen6.xml1
-rw-r--r--src/intel/genxml/gen7.xml1
-rw-r--r--src/intel/genxml/gen75.xml1
-rw-r--r--src/intel/genxml/gen8.xml1
-rw-r--r--src/intel/genxml/gen9.xml1
5 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 52d0ecba13b..5be46261708 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1305,6 +1305,7 @@
<field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="14"/>
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Stencil Buffer Object Control State" start="57" end="60" type="MEMORY_OBJECT_CONTROL_STATE"/>
+ <field name="Stencil Buffer MOCS" start="57" end="60" type="uint"/>
<field name="Surface Pitch" start="32" end="48" type="uint"/>
<field name="Surface Base Address" start="64" end="95" type="address"/>
</instruction>
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 44bb2a7373f..ad866c1a8a1 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1693,6 +1693,7 @@
<field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="6"/>
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Stencil Buffer Object Control State" start="57" end="60" type="MEMORY_OBJECT_CONTROL_STATE"/>
+ <field name="Stencil Buffer MOCS" start="57" end="60" type="uint"/>
<field name="Surface Pitch" start="32" end="48" type="uint"/>
<field name="Surface Base Address" start="64" end="95" type="address"/>
</instruction>
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index b8f5a1476fd..ab320fc27e4 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1941,6 +1941,7 @@
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Stencil Buffer Enable" start="63" end="63" type="uint"/>
<field name="Stencil Buffer Object Control State" start="57" end="60" type="MEMORY_OBJECT_CONTROL_STATE"/>
+ <field name="Stencil Buffer MOCS" start="57" end="60" type="uint"/>
<field name="Surface Pitch" start="32" end="48" type="uint"/>
<field name="Surface Base Address" start="64" end="95" type="address"/>
</instruction>
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 5b2290edc77..0dbcbcd7f9a 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2027,6 +2027,7 @@
<field name="DWord Length" start="0" end="7" type="uint" default="3"/>
<field name="Stencil Buffer Enable" start="63" end="63" type="uint"/>
<field name="Stencil Buffer Object Control State" start="54" end="60" type="MEMORY_OBJECT_CONTROL_STATE"/>
+ <field name="Stencil Buffer MOCS" start="54" end="60" type="uint"/>
<field name="Surface Pitch" start="32" end="48" type="uint"/>
<field name="Surface Base Address" start="64" end="127" type="address"/>
<field name="Surface QPitch" start="128" end="142" type="uint"/>
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 547d47ff8cd..be5cc01f287 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2201,6 +2201,7 @@
<field name="DWord Length" start="0" end="7" type="uint" default="3"/>
<field name="Stencil Buffer Enable" start="63" end="63" type="uint"/>
<field name="Stencil Buffer Object Control State" start="54" end="60" type="MEMORY_OBJECT_CONTROL_STATE"/>
+ <field name="Stencil Buffer MOCS" start="54" end="60" type="uint"/>
<field name="Surface Pitch" start="32" end="48" type="uint"/>
<field name="Surface Base Address" start="64" end="127" type="address"/>
<field name="Surface QPitch" start="128" end="142" type="uint"/>