diff options
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 45 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 45 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.h | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 26 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.h | 2 |
6 files changed, 49 insertions, 76 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 1d810d82c1e..b45035e80f0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -340,51 +340,6 @@ fs_inst::overwrites_reg(const fs_reg ®) } bool -fs_inst::is_tex() -{ - return (opcode == SHADER_OPCODE_TEX || - opcode == FS_OPCODE_TXB || - opcode == SHADER_OPCODE_TXD || - opcode == SHADER_OPCODE_TXF || - opcode == SHADER_OPCODE_TXF_MS || - opcode == SHADER_OPCODE_TXL || - opcode == SHADER_OPCODE_TXS || - opcode == SHADER_OPCODE_LOD); -} - -bool -fs_inst::is_math() -{ - return (opcode == SHADER_OPCODE_RCP || - opcode == SHADER_OPCODE_RSQ || - opcode == SHADER_OPCODE_SQRT || - opcode == SHADER_OPCODE_EXP2 || - opcode == SHADER_OPCODE_LOG2 || - opcode == SHADER_OPCODE_SIN || - opcode == SHADER_OPCODE_COS || - opcode == SHADER_OPCODE_INT_QUOTIENT || - opcode == SHADER_OPCODE_INT_REMAINDER || - opcode == SHADER_OPCODE_POW); -} - -bool -fs_inst::is_control_flow() -{ - switch (opcode) { - case BRW_OPCODE_DO: - case BRW_OPCODE_WHILE: - case BRW_OPCODE_IF: - case BRW_OPCODE_ELSE: - case BRW_OPCODE_ENDIF: - case BRW_OPCODE_BREAK: - case BRW_OPCODE_CONTINUE: - return true; - default: - return false; - } -} - -bool fs_inst::is_send_from_grf() { return (opcode == FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7 || diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 86a9ec590a4..efe90f4ae01 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -175,9 +175,6 @@ public: bool equals(fs_inst *inst); bool overwrites_reg(const fs_reg ®); - bool is_tex(); - bool is_math(); - bool is_control_flow(); bool is_send_from_grf(); bool is_partial_write(); diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 5addff67318..a8209527d53 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -508,3 +508,48 @@ brw_instruction_name(enum opcode op) return fallback; } } + +bool +backend_instruction::is_tex() +{ + return (opcode == SHADER_OPCODE_TEX || + opcode == FS_OPCODE_TXB || + opcode == SHADER_OPCODE_TXD || + opcode == SHADER_OPCODE_TXF || + opcode == SHADER_OPCODE_TXF_MS || + opcode == SHADER_OPCODE_TXL || + opcode == SHADER_OPCODE_TXS || + opcode == SHADER_OPCODE_LOD); +} + +bool +backend_instruction::is_math() +{ + return (opcode == SHADER_OPCODE_RCP || + opcode == SHADER_OPCODE_RSQ || + opcode == SHADER_OPCODE_SQRT || + opcode == SHADER_OPCODE_EXP2 || + opcode == SHADER_OPCODE_LOG2 || + opcode == SHADER_OPCODE_SIN || + opcode == SHADER_OPCODE_COS || + opcode == SHADER_OPCODE_INT_QUOTIENT || + opcode == SHADER_OPCODE_INT_REMAINDER || + opcode == SHADER_OPCODE_POW); +} + +bool +backend_instruction::is_control_flow() +{ + switch (opcode) { + case BRW_OPCODE_DO: + case BRW_OPCODE_WHILE: + case BRW_OPCODE_IF: + case BRW_OPCODE_ELSE: + case BRW_OPCODE_ENDIF: + case BRW_OPCODE_BREAK: + case BRW_OPCODE_CONTINUE: + return true; + default: + return false; + } +} diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index a29618f7343..5189fdcb07e 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -29,6 +29,10 @@ class backend_instruction : public exec_node { public: + bool is_tex(); + bool is_math(); + bool is_control_flow(); + enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */ uint32_t predicate; diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 0afff6f72c5..ab4668f425f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -141,17 +141,6 @@ src_reg::src_reg(dst_reg reg) swizzles[2], swizzles[3]); } -bool -vec4_instruction::is_tex() -{ - return (opcode == SHADER_OPCODE_TEX || - opcode == SHADER_OPCODE_TXD || - opcode == SHADER_OPCODE_TXF || - opcode == SHADER_OPCODE_TXF_MS || - opcode == SHADER_OPCODE_TXL || - opcode == SHADER_OPCODE_TXS); -} - void dst_reg::init() { @@ -213,21 +202,6 @@ dst_reg::dst_reg(src_reg reg) } bool -vec4_instruction::is_math() -{ - return (opcode == SHADER_OPCODE_RCP || - opcode == SHADER_OPCODE_RSQ || - opcode == SHADER_OPCODE_SQRT || - opcode == SHADER_OPCODE_EXP2 || - opcode == SHADER_OPCODE_LOG2 || - opcode == SHADER_OPCODE_SIN || - opcode == SHADER_OPCODE_COS || - opcode == SHADER_OPCODE_INT_QUOTIENT || - opcode == SHADER_OPCODE_INT_REMAINDER || - opcode == SHADER_OPCODE_POW); -} - -bool vec4_instruction::is_send_from_grf() { switch (opcode) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index d34ed35ebc6..a4fca2d732a 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -193,8 +193,6 @@ public: const void *ir; const char *annotation; - bool is_tex(); - bool is_math(); bool is_send_from_grf(); bool can_reswizzle_dst(int dst_writemask, int swizzle, int swizzle_mask); void reswizzle_dst(int dst_writemask, int swizzle); |