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-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h4
-rw-r--r--src/mesa/drivers/dri/i965/gen7_sol_state.c6
2 files changed, 7 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 321bffe922f..a1236b7c08f 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -200,6 +200,10 @@ void gen7_init_vtable_surface_functions(struct brw_context *brw);
void gen7_create_shader_time_surface(struct brw_context *brw,
uint32_t *out_offset);
+/* gen7_sol_state.c */
+void gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
+ const struct brw_vue_map *vue_map);
+
/* brw_wm_sampler_state.c */
uint32_t translate_wrap_mode(GLenum wrap, bool using_nearest);
void upload_default_color(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index 034efe80e85..185e422208f 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -97,9 +97,9 @@ upload_3dstate_so_buffers(struct brw_context *brw)
* stream. We only have one stream of rendering coming out of the GS unit, so
* we only emit stream 0 (low 16 bits) SO_DECLs.
*/
-static void
-upload_3dstate_so_decl_list(struct brw_context *brw,
- const struct brw_vue_map *vue_map)
+void
+gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
+ const struct brw_vue_map *vue_map)
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_VERTEX_PROGRAM */