diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_sf_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_sf_state.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c index 67b649e7b79..67119d8d182 100644 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c @@ -118,6 +118,8 @@ upload_sf_state(struct brw_context *brw) GLbitfield64 vs_outputs_written = brw->vs.prog_data->outputs_written; /* BRW_NEW_FRAGMENT_PROGRAM */ uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead); + /* _NEW_LIGHT */ + bool shade_model_flat = ctx->Light.ShadeModel == GL_FLAT; uint32_t dw1, dw2, dw3, dw4, dw16, dw17; int i; /* _NEW_BUFFER */ @@ -263,6 +265,10 @@ upload_sf_state(struct brw_context *brw) * they source from. */ for (; attr < FRAG_ATTRIB_MAX; attr++) { + enum glsl_interp_qualifier interp_qualifier = + brw->fragment_program->InterpQualifier[attr]; + bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1; + if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr))) continue; @@ -277,17 +283,10 @@ upload_sf_state(struct brw_context *brw) dw16 |= (1 << input_index); /* flat shading */ - if (ctx->Light.ShadeModel == GL_FLAT) { - /* - * Setup the Constant Interpolation Enable bit mask for each - * corresponding attribute(currently, we only care two attrs: - * FRAG_BIT_COL0 and FRAG_BIT_COL1). - * - * FIXME: should we care other attributes? - */ - if (attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1) - dw17 |= (1 << input_index); - } + if (interp_qualifier == INTERP_QUALIFIER_FLAT || + (shade_model_flat && is_gl_Color && + interp_qualifier == INTERP_QUALIFIER_NONE)) + dw17 |= (1 << input_index); /* The hardware can only do the overrides on 16 overrides at a * time, and the other up to 16 have to be lined up so that the |