diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 161d140a3df..d4519400f83 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -626,11 +626,11 @@ brw_emit_null_surface_state(struct brw_context *brw, * While it is only used for the front/back buffer currently, it should be * usable for further buffers when doing ARB_draw_buffer support. */ -static void +static uint32_t brw_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, - unsigned int unit) + struct gl_renderbuffer *rb, + bool layered, unsigned unit, + uint32_t surf_index) { struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); @@ -638,11 +638,10 @@ brw_update_renderbuffer_surface(struct brw_context *brw, uint32_t *surf; uint32_t tile_x, tile_y; uint32_t format = 0; + uint32_t offset; /* _NEW_BUFFERS */ mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); /* BRW_NEW_FS_PROG_DATA */ - uint32_t surf_index = - brw->wm.prog_data->binding_table.render_target_start + unit; assert(!layered); @@ -663,8 +662,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, intel_miptree_used_for_rendering(irb->mt); - surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, - &brw->wm.base.surf_offset[surf_index]); + surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, &offset); format = brw->render_target_format[rb_format]; if (unlikely(!brw->format_supported_as_render_target[rb_format])) { @@ -721,11 +719,13 @@ brw_update_renderbuffer_surface(struct brw_context *brw, } drm_intel_bo_emit_reloc(brw->batch.bo, - brw->wm.base.surf_offset[surf_index] + 4, - mt->bo, - surf[1] - mt->bo->offset64, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER); + offset + 4, + mt->bo, + surf[1] - mt->bo->offset64, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER); + + return offset; } /** @@ -743,13 +743,15 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw) /* Update surfaces for drawing buffers */ if (ctx->DrawBuffer->_NumColorDrawBuffers >= 1) { for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { + const uint32_t surf_index = + brw->wm.prog_data->binding_table.render_target_start + i; + if (intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[i])) { - brw->vtbl.update_renderbuffer_surface(brw, ctx->DrawBuffer->_ColorDrawBuffers[i], - ctx->DrawBuffer->MaxNumLayers > 0, i); + brw->wm.base.surf_offset[surf_index] = + brw->vtbl.update_renderbuffer_surface( + brw, ctx->DrawBuffer->_ColorDrawBuffers[i], + ctx->DrawBuffer->MaxNumLayers > 0, i, surf_index); } else { - const uint32_t surf_index = - brw->wm.prog_data->binding_table.render_target_start + i; - brw->vtbl.emit_null_surface_state( brw, fb->Width, fb->Height, fb->Visual.samples, &brw->wm.base.surf_offset[surf_index]); |