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-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b02f1dc0b91..d32d75990de 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -4523,7 +4523,8 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
case SHADER_OPCODE_SIN:
- case SHADER_OPCODE_COS: {
+ case SHADER_OPCODE_COS:
+ case FS_OPCODE_PACK: {
/* According to the PRMs:
* "A. In Direct Addressing mode, a source cannot span more than 2
* adjacent GRF registers.